diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2013-01-22 06:59:30 -0500 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2013-02-01 04:00:22 -0500 |
| commit | 7034228792cc561e79ff8600f02884bd4c80e287 (patch) | |
| tree | 89b77af37d087d9de236fc5d21f60bf552d0a2c6 /arch/mips/kernel/r2300_fpu.S | |
| parent | 405ab01c70e18058d9c01a1256769a61fc65413e (diff) | |
MIPS: Whitespace cleanup.
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/r2300_fpu.S')
| -rw-r--r-- | arch/mips/kernel/r2300_fpu.S | 128 |
1 files changed, 64 insertions, 64 deletions
diff --git a/arch/mips/kernel/r2300_fpu.S b/arch/mips/kernel/r2300_fpu.S index 61c8a0f2a60c..f31063dbdaeb 100644 --- a/arch/mips/kernel/r2300_fpu.S +++ b/arch/mips/kernel/r2300_fpu.S | |||
| @@ -30,38 +30,38 @@ | |||
| 30 | LEAF(_save_fp_context) | 30 | LEAF(_save_fp_context) |
| 31 | li v0, 0 # assume success | 31 | li v0, 0 # assume success |
| 32 | cfc1 t1,fcr31 | 32 | cfc1 t1,fcr31 |
| 33 | EX(swc1 $f0,(SC_FPREGS+0)(a0)) | 33 | EX(swc1 $f0,(SC_FPREGS+0)(a0)) |
| 34 | EX(swc1 $f1,(SC_FPREGS+8)(a0)) | 34 | EX(swc1 $f1,(SC_FPREGS+8)(a0)) |
| 35 | EX(swc1 $f2,(SC_FPREGS+16)(a0)) | 35 | EX(swc1 $f2,(SC_FPREGS+16)(a0)) |
| 36 | EX(swc1 $f3,(SC_FPREGS+24)(a0)) | 36 | EX(swc1 $f3,(SC_FPREGS+24)(a0)) |
| 37 | EX(swc1 $f4,(SC_FPREGS+32)(a0)) | 37 | EX(swc1 $f4,(SC_FPREGS+32)(a0)) |
| 38 | EX(swc1 $f5,(SC_FPREGS+40)(a0)) | 38 | EX(swc1 $f5,(SC_FPREGS+40)(a0)) |
| 39 | EX(swc1 $f6,(SC_FPREGS+48)(a0)) | 39 | EX(swc1 $f6,(SC_FPREGS+48)(a0)) |
| 40 | EX(swc1 $f7,(SC_FPREGS+56)(a0)) | 40 | EX(swc1 $f7,(SC_FPREGS+56)(a0)) |
| 41 | EX(swc1 $f8,(SC_FPREGS+64)(a0)) | 41 | EX(swc1 $f8,(SC_FPREGS+64)(a0)) |
| 42 | EX(swc1 $f9,(SC_FPREGS+72)(a0)) | 42 | EX(swc1 $f9,(SC_FPREGS+72)(a0)) |
| 43 | EX(swc1 $f10,(SC_FPREGS+80)(a0)) | 43 | EX(swc1 $f10,(SC_FPREGS+80)(a0)) |
| 44 | EX(swc1 $f11,(SC_FPREGS+88)(a0)) | 44 | EX(swc1 $f11,(SC_FPREGS+88)(a0)) |
| 45 | EX(swc1 $f12,(SC_FPREGS+96)(a0)) | 45 | EX(swc1 $f12,(SC_FPREGS+96)(a0)) |
| 46 | EX(swc1 $f13,(SC_FPREGS+104)(a0)) | 46 | EX(swc1 $f13,(SC_FPREGS+104)(a0)) |
| 47 | EX(swc1 $f14,(SC_FPREGS+112)(a0)) | 47 | EX(swc1 $f14,(SC_FPREGS+112)(a0)) |
| 48 | EX(swc1 $f15,(SC_FPREGS+120)(a0)) | 48 | EX(swc1 $f15,(SC_FPREGS+120)(a0)) |
| 49 | EX(swc1 $f16,(SC_FPREGS+128)(a0)) | 49 | EX(swc1 $f16,(SC_FPREGS+128)(a0)) |
| 50 | EX(swc1 $f17,(SC_FPREGS+136)(a0)) | 50 | EX(swc1 $f17,(SC_FPREGS+136)(a0)) |
| 51 | EX(swc1 $f18,(SC_FPREGS+144)(a0)) | 51 | EX(swc1 $f18,(SC_FPREGS+144)(a0)) |
| 52 | EX(swc1 $f19,(SC_FPREGS+152)(a0)) | 52 | EX(swc1 $f19,(SC_FPREGS+152)(a0)) |
| 53 | EX(swc1 $f20,(SC_FPREGS+160)(a0)) | 53 | EX(swc1 $f20,(SC_FPREGS+160)(a0)) |
| 54 | EX(swc1 $f21,(SC_FPREGS+168)(a0)) | 54 | EX(swc1 $f21,(SC_FPREGS+168)(a0)) |
| 55 | EX(swc1 $f22,(SC_FPREGS+176)(a0)) | 55 | EX(swc1 $f22,(SC_FPREGS+176)(a0)) |
| 56 | EX(swc1 $f23,(SC_FPREGS+184)(a0)) | 56 | EX(swc1 $f23,(SC_FPREGS+184)(a0)) |
| 57 | EX(swc1 $f24,(SC_FPREGS+192)(a0)) | 57 | EX(swc1 $f24,(SC_FPREGS+192)(a0)) |
| 58 | EX(swc1 $f25,(SC_FPREGS+200)(a0)) | 58 | EX(swc1 $f25,(SC_FPREGS+200)(a0)) |
| 59 | EX(swc1 $f26,(SC_FPREGS+208)(a0)) | 59 | EX(swc1 $f26,(SC_FPREGS+208)(a0)) |
| 60 | EX(swc1 $f27,(SC_FPREGS+216)(a0)) | 60 | EX(swc1 $f27,(SC_FPREGS+216)(a0)) |
| 61 | EX(swc1 $f28,(SC_FPREGS+224)(a0)) | 61 | EX(swc1 $f28,(SC_FPREGS+224)(a0)) |
| 62 | EX(swc1 $f29,(SC_FPREGS+232)(a0)) | 62 | EX(swc1 $f29,(SC_FPREGS+232)(a0)) |
| 63 | EX(swc1 $f30,(SC_FPREGS+240)(a0)) | 63 | EX(swc1 $f30,(SC_FPREGS+240)(a0)) |
| 64 | EX(swc1 $f31,(SC_FPREGS+248)(a0)) | 64 | EX(swc1 $f31,(SC_FPREGS+248)(a0)) |
| 65 | EX(sw t1,(SC_FPC_CSR)(a0)) | 65 | EX(sw t1,(SC_FPC_CSR)(a0)) |
| 66 | cfc1 t0,$0 # implementation/version | 66 | cfc1 t0,$0 # implementation/version |
| 67 | jr ra | 67 | jr ra |
| @@ -82,38 +82,38 @@ LEAF(_save_fp_context) | |||
| 82 | LEAF(_restore_fp_context) | 82 | LEAF(_restore_fp_context) |
| 83 | li v0, 0 # assume success | 83 | li v0, 0 # assume success |
| 84 | EX(lw t0,(SC_FPC_CSR)(a0)) | 84 | EX(lw t0,(SC_FPC_CSR)(a0)) |
| 85 | EX(lwc1 $f0,(SC_FPREGS+0)(a0)) | 85 | EX(lwc1 $f0,(SC_FPREGS+0)(a0)) |
| 86 | EX(lwc1 $f1,(SC_FPREGS+8)(a0)) | 86 | EX(lwc1 $f1,(SC_FPREGS+8)(a0)) |
| 87 | EX(lwc1 $f2,(SC_FPREGS+16)(a0)) | 87 | EX(lwc1 $f2,(SC_FPREGS+16)(a0)) |
| 88 | EX(lwc1 $f3,(SC_FPREGS+24)(a0)) | 88 | EX(lwc1 $f3,(SC_FPREGS+24)(a0)) |
| 89 | EX(lwc1 $f4,(SC_FPREGS+32)(a0)) | 89 | EX(lwc1 $f4,(SC_FPREGS+32)(a0)) |
| 90 | EX(lwc1 $f5,(SC_FPREGS+40)(a0)) | 90 | EX(lwc1 $f5,(SC_FPREGS+40)(a0)) |
| 91 | EX(lwc1 $f6,(SC_FPREGS+48)(a0)) | 91 | EX(lwc1 $f6,(SC_FPREGS+48)(a0)) |
| 92 | EX(lwc1 $f7,(SC_FPREGS+56)(a0)) | 92 | EX(lwc1 $f7,(SC_FPREGS+56)(a0)) |
| 93 | EX(lwc1 $f8,(SC_FPREGS+64)(a0)) | 93 | EX(lwc1 $f8,(SC_FPREGS+64)(a0)) |
| 94 | EX(lwc1 $f9,(SC_FPREGS+72)(a0)) | 94 | EX(lwc1 $f9,(SC_FPREGS+72)(a0)) |
| 95 | EX(lwc1 $f10,(SC_FPREGS+80)(a0)) | 95 | EX(lwc1 $f10,(SC_FPREGS+80)(a0)) |
| 96 | EX(lwc1 $f11,(SC_FPREGS+88)(a0)) | 96 | EX(lwc1 $f11,(SC_FPREGS+88)(a0)) |
| 97 | EX(lwc1 $f12,(SC_FPREGS+96)(a0)) | 97 | EX(lwc1 $f12,(SC_FPREGS+96)(a0)) |
| 98 | EX(lwc1 $f13,(SC_FPREGS+104)(a0)) | 98 | EX(lwc1 $f13,(SC_FPREGS+104)(a0)) |
| 99 | EX(lwc1 $f14,(SC_FPREGS+112)(a0)) | 99 | EX(lwc1 $f14,(SC_FPREGS+112)(a0)) |
| 100 | EX(lwc1 $f15,(SC_FPREGS+120)(a0)) | 100 | EX(lwc1 $f15,(SC_FPREGS+120)(a0)) |
| 101 | EX(lwc1 $f16,(SC_FPREGS+128)(a0)) | 101 | EX(lwc1 $f16,(SC_FPREGS+128)(a0)) |
| 102 | EX(lwc1 $f17,(SC_FPREGS+136)(a0)) | 102 | EX(lwc1 $f17,(SC_FPREGS+136)(a0)) |
| 103 | EX(lwc1 $f18,(SC_FPREGS+144)(a0)) | 103 | EX(lwc1 $f18,(SC_FPREGS+144)(a0)) |
| 104 | EX(lwc1 $f19,(SC_FPREGS+152)(a0)) | 104 | EX(lwc1 $f19,(SC_FPREGS+152)(a0)) |
| 105 | EX(lwc1 $f20,(SC_FPREGS+160)(a0)) | 105 | EX(lwc1 $f20,(SC_FPREGS+160)(a0)) |
| 106 | EX(lwc1 $f21,(SC_FPREGS+168)(a0)) | 106 | EX(lwc1 $f21,(SC_FPREGS+168)(a0)) |
| 107 | EX(lwc1 $f22,(SC_FPREGS+176)(a0)) | 107 | EX(lwc1 $f22,(SC_FPREGS+176)(a0)) |
| 108 | EX(lwc1 $f23,(SC_FPREGS+184)(a0)) | 108 | EX(lwc1 $f23,(SC_FPREGS+184)(a0)) |
| 109 | EX(lwc1 $f24,(SC_FPREGS+192)(a0)) | 109 | EX(lwc1 $f24,(SC_FPREGS+192)(a0)) |
| 110 | EX(lwc1 $f25,(SC_FPREGS+200)(a0)) | 110 | EX(lwc1 $f25,(SC_FPREGS+200)(a0)) |
| 111 | EX(lwc1 $f26,(SC_FPREGS+208)(a0)) | 111 | EX(lwc1 $f26,(SC_FPREGS+208)(a0)) |
| 112 | EX(lwc1 $f27,(SC_FPREGS+216)(a0)) | 112 | EX(lwc1 $f27,(SC_FPREGS+216)(a0)) |
| 113 | EX(lwc1 $f28,(SC_FPREGS+224)(a0)) | 113 | EX(lwc1 $f28,(SC_FPREGS+224)(a0)) |
| 114 | EX(lwc1 $f29,(SC_FPREGS+232)(a0)) | 114 | EX(lwc1 $f29,(SC_FPREGS+232)(a0)) |
| 115 | EX(lwc1 $f30,(SC_FPREGS+240)(a0)) | 115 | EX(lwc1 $f30,(SC_FPREGS+240)(a0)) |
| 116 | EX(lwc1 $f31,(SC_FPREGS+248)(a0)) | 116 | EX(lwc1 $f31,(SC_FPREGS+248)(a0)) |
| 117 | jr ra | 117 | jr ra |
| 118 | ctc1 t0,fcr31 | 118 | ctc1 t0,fcr31 |
| 119 | END(_restore_fp_context) | 119 | END(_restore_fp_context) |