[MIPS] MT: Improved multithreading support.

    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 14 insertions, 0 deletions

diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c
index 0d5cf97af727..8704dc0496ea 100644
--- a/arch/mips/kernel/ptrace32.c
+++ b/arch/mips/kernel/ptrace32.c
@@ -173,12 +173,22 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
                         break;
                 case FPC_EIR: { /* implementation / version register */
                         unsigned int flags;
+#ifdef CONFIG_MIPS_MT_SMTC
+                        unsigned int irqflags;
+                        unsigned int mtflags;
+#endif /* CONFIG_MIPS_MT_SMTC */
 
                         if (!cpu_has_fpu) {
                                 tmp = 0;
                                 break;
                         }
 
+#ifdef CONFIG_MIPS_MT_SMTC
+                        /* Read-modify-write of Status must be atomic */
+                        local_irq_save(irqflags);
+                        mtflags = dmt();
+#endif /* CONFIG_MIPS_MT_SMTC */
+
                         preempt_disable();
                         if (cpu_has_mipsmt) {
                                 unsigned int vpflags = dvpe();
@@ -193,6 +203,10 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
                                 __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
                                 write_c0_status(flags);
                         }
+#ifdef CONFIG_MIPS_MT_SMTC
+                        emt(mtflags);
+                        local_irq_restore(irqflags);
+#endif /* CONFIG_MIPS_MT_SMTC */
                         preempt_enable();
                         break;
                 }