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authorRalf Baechle <ralf@linux-mips.org>2005-09-03 18:56:16 -0400
committerLinus Torvalds <torvalds@evo.osdl.org>2005-09-05 03:06:06 -0400
commit875d43e72b5bf22161a81de7554f88eccf8a51ae (patch)
treea676fe7298b478b7ee9fe7be9cb07c9a0b928370 /arch/mips/kernel/ptrace.c
parent63fb6fd1c86181d9dd9ba0e6e6082799e149b56b (diff)
[PATCH] mips: clean up 32/64-bit configuration
Start cleaning 32-bit vs. 64-bit configuration. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/mips/kernel/ptrace.c')
-rw-r--r--arch/mips/kernel/ptrace.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index 92e70ca3bff9..0b571a5b4b83 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -124,7 +124,7 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
124 if (tsk_used_math(child)) { 124 if (tsk_used_math(child)) {
125 fpureg_t *fregs = get_fpu_regs(child); 125 fpureg_t *fregs = get_fpu_regs(child);
126 126
127#ifdef CONFIG_MIPS32 127#ifdef CONFIG_32BIT
128 /* 128 /*
129 * The odd registers are actually the high 129 * The odd registers are actually the high
130 * order bits of the values stored in the even 130 * order bits of the values stored in the even
@@ -135,7 +135,7 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
135 else 135 else
136 tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff); 136 tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff);
137#endif 137#endif
138#ifdef CONFIG_MIPS64 138#ifdef CONFIG_64BIT
139 tmp = fregs[addr - FPR_BASE]; 139 tmp = fregs[addr - FPR_BASE];
140#endif 140#endif
141 } else { 141 } else {
@@ -213,7 +213,7 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
213 sizeof(child->thread.fpu.hard)); 213 sizeof(child->thread.fpu.hard));
214 child->thread.fpu.hard.fcr31 = 0; 214 child->thread.fpu.hard.fcr31 = 0;
215 } 215 }
216#ifdef CONFIG_MIPS32 216#ifdef CONFIG_32BIT
217 /* 217 /*
218 * The odd registers are actually the high order bits 218 * The odd registers are actually the high order bits
219 * of the values stored in the even registers - unless 219 * of the values stored in the even registers - unless
@@ -227,7 +227,7 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
227 fregs[addr - FPR_BASE] |= data; 227 fregs[addr - FPR_BASE] |= data;
228 } 228 }
229#endif 229#endif
230#ifdef CONFIG_MIPS64 230#ifdef CONFIG_64BIT
231 fregs[addr - FPR_BASE] = data; 231 fregs[addr - FPR_BASE] = data;
232#endif 232#endif
233 break; 233 break;
@@ -304,14 +304,14 @@ out:
304static inline int audit_arch(void) 304static inline int audit_arch(void)
305{ 305{
306#ifdef CONFIG_CPU_LITTLE_ENDIAN 306#ifdef CONFIG_CPU_LITTLE_ENDIAN
307#ifdef CONFIG_MIPS64 307#ifdef CONFIG_64BIT
308 if (!(current->thread.mflags & MF_32BIT_REGS)) 308 if (!(current->thread.mflags & MF_32BIT_REGS))
309 return AUDIT_ARCH_MIPSEL64; 309 return AUDIT_ARCH_MIPSEL64;
310#endif /* MIPS64 */ 310#endif /* MIPS64 */
311 return AUDIT_ARCH_MIPSEL; 311 return AUDIT_ARCH_MIPSEL;
312 312
313#else /* big endian... */ 313#else /* big endian... */
314#ifdef CONFIG_MIPS64 314#ifdef CONFIG_64BIT
315 if (!(current->thread.mflags & MF_32BIT_REGS)) 315 if (!(current->thread.mflags & MF_32BIT_REGS))
316 return AUDIT_ARCH_MIPS64; 316 return AUDIT_ARCH_MIPS64;
317#endif /* MIPS64 */ 317#endif /* MIPS64 */