diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-18 17:28:48 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-18 17:28:48 -0500 |
commit | 5d7e8af3c5727626b9e7f909c778b9ac9b4a1809 (patch) | |
tree | 13d51e31ee070113538a6d26d9a52503ba4a3cd0 /arch/mips/kernel/proc.c | |
parent | aa891f6b3f440402c6879ad1ecf332d318137422 (diff) | |
parent | 79aa18d557bef02171da42ee928c23509e6ef4f7 (diff) |
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: (26 commits)
MIPS: Malta: enable Cirrus FB console
MIPS: add CONFIG_VIRTUALIZATION for virtio support
MIPS: Implement __read_mostly
MIPS: ath79: add common WMAC device for AR913X based boards
MIPS: ath79: Add initial support for the Atheros AP81 reference board
MIPS: ath79: add common SPI controller device
SPI: Add SPI controller driver for the Atheros AR71XX/AR724X/AR913X SoCs
MIPS: ath79: add common GPIO buttons device
MIPS: ath79: add common watchdog device
MIPS: ath79: add common GPIO LEDs device
MIPS: ath79: add initial support for the Atheros PB44 reference board
MIPS: ath79: utilize the MIPS multi-machine support
MIPS: ath79: add GPIOLIB support
MIPS: Add initial support for the Atheros AR71XX/AR724X/AR931X SoCs
MIPS: jump label: Add MIPS support.
MIPS: Use WARN() in uasm for better diagnostics.
MIPS: Optimize TLB handlers for Octeon CPUs
MIPS: Add LDX and LWX instructions to uasm.
MIPS: Use BBIT instructions in TLB handlers
MIPS: Declare uasm bbit0 and bbit1 functions.
...
Diffstat (limited to 'arch/mips/kernel/proc.c')
-rw-r--r-- | arch/mips/kernel/proc.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 26109c4d5170..e309665b6c81 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c | |||
@@ -12,6 +12,7 @@ | |||
12 | #include <asm/cpu-features.h> | 12 | #include <asm/cpu-features.h> |
13 | #include <asm/mipsregs.h> | 13 | #include <asm/mipsregs.h> |
14 | #include <asm/processor.h> | 14 | #include <asm/processor.h> |
15 | #include <asm/mips_machine.h> | ||
15 | 16 | ||
16 | unsigned int vced_count, vcei_count; | 17 | unsigned int vced_count, vcei_count; |
17 | 18 | ||
@@ -31,8 +32,12 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
31 | /* | 32 | /* |
32 | * For the first processor also print the system type | 33 | * For the first processor also print the system type |
33 | */ | 34 | */ |
34 | if (n == 0) | 35 | if (n == 0) { |
35 | seq_printf(m, "system type\t\t: %s\n", get_system_type()); | 36 | seq_printf(m, "system type\t\t: %s\n", get_system_type()); |
37 | if (mips_get_machine_name()) | ||
38 | seq_printf(m, "machine\t\t\t: %s\n", | ||
39 | mips_get_machine_name()); | ||
40 | } | ||
36 | 41 | ||
37 | seq_printf(m, "processor\t\t: %ld\n", n); | 42 | seq_printf(m, "processor\t\t: %ld\n", n); |
38 | sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n", | 43 | sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n", |
@@ -69,6 +74,8 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
69 | ); | 74 | ); |
70 | seq_printf(m, "shadow register sets\t: %d\n", | 75 | seq_printf(m, "shadow register sets\t: %d\n", |
71 | cpu_data[n].srsets); | 76 | cpu_data[n].srsets); |
77 | seq_printf(m, "kscratch registers\t: %d\n", | ||
78 | hweight8(cpu_data[n].kscratch_mask)); | ||
72 | seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core); | 79 | seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core); |
73 | 80 | ||
74 | sprintf(fmt, "VCE%%c exceptions\t\t: %s\n", | 81 | sprintf(fmt, "VCE%%c exceptions\t\t: %s\n", |