diff options
author | Paul Mackerras <paulus@samba.org> | 2005-10-30 21:37:12 -0500 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2005-10-30 21:37:12 -0500 |
commit | 23fd07750a789a66fe88cf173d52a18f1a387da4 (patch) | |
tree | 06fdd6df35fdb835abdaa9b754d62f6b84b97250 /arch/mips/kernel/proc.c | |
parent | bd787d438a59266af3c9f6351644c85ef1dd21fe (diff) | |
parent | ed28f96ac1960f30f818374d65be71d2fdf811b0 (diff) |
Merge ../linux-2.6 by hand
Diffstat (limited to 'arch/mips/kernel/proc.c')
-rw-r--r-- | arch/mips/kernel/proc.c | 135 |
1 files changed, 75 insertions, 60 deletions
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 0f159f30e894..86fe15b273cd 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c | |||
@@ -2,7 +2,8 @@ | |||
2 | * linux/arch/mips/kernel/proc.c | 2 | * linux/arch/mips/kernel/proc.c |
3 | * | 3 | * |
4 | * Copyright (C) 1995, 1996, 2001 Ralf Baechle | 4 | * Copyright (C) 1995, 1996, 2001 Ralf Baechle |
5 | * Copyright (C) 2001 MIPS Technologies, Inc. | 5 | * Copyright (C) 2001, 2004 MIPS Technologies, Inc. |
6 | * Copyright (C) 2004 Maciej W. Rozycki | ||
6 | */ | 7 | */ |
7 | #include <linux/config.h> | 8 | #include <linux/config.h> |
8 | #include <linux/delay.h> | 9 | #include <linux/delay.h> |
@@ -19,63 +20,69 @@ | |||
19 | unsigned int vced_count, vcei_count; | 20 | unsigned int vced_count, vcei_count; |
20 | 21 | ||
21 | static const char *cpu_name[] = { | 22 | static const char *cpu_name[] = { |
22 | [CPU_UNKNOWN] "unknown", | 23 | [CPU_UNKNOWN] = "unknown", |
23 | [CPU_R2000] "R2000", | 24 | [CPU_R2000] = "R2000", |
24 | [CPU_R3000] "R3000", | 25 | [CPU_R3000] = "R3000", |
25 | [CPU_R3000A] "R3000A", | 26 | [CPU_R3000A] = "R3000A", |
26 | [CPU_R3041] "R3041", | 27 | [CPU_R3041] = "R3041", |
27 | [CPU_R3051] "R3051", | 28 | [CPU_R3051] = "R3051", |
28 | [CPU_R3052] "R3052", | 29 | [CPU_R3052] = "R3052", |
29 | [CPU_R3081] "R3081", | 30 | [CPU_R3081] = "R3081", |
30 | [CPU_R3081E] "R3081E", | 31 | [CPU_R3081E] = "R3081E", |
31 | [CPU_R4000PC] "R4000PC", | 32 | [CPU_R4000PC] = "R4000PC", |
32 | [CPU_R4000SC] "R4000SC", | 33 | [CPU_R4000SC] = "R4000SC", |
33 | [CPU_R4000MC] "R4000MC", | 34 | [CPU_R4000MC] = "R4000MC", |
34 | [CPU_R4200] "R4200", | 35 | [CPU_R4200] = "R4200", |
35 | [CPU_R4400PC] "R4400PC", | 36 | [CPU_R4400PC] = "R4400PC", |
36 | [CPU_R4400SC] "R4400SC", | 37 | [CPU_R4400SC] = "R4400SC", |
37 | [CPU_R4400MC] "R4400MC", | 38 | [CPU_R4400MC] = "R4400MC", |
38 | [CPU_R4600] "R4600", | 39 | [CPU_R4600] = "R4600", |
39 | [CPU_R6000] "R6000", | 40 | [CPU_R6000] = "R6000", |
40 | [CPU_R6000A] "R6000A", | 41 | [CPU_R6000A] = "R6000A", |
41 | [CPU_R8000] "R8000", | 42 | [CPU_R8000] = "R8000", |
42 | [CPU_R10000] "R10000", | 43 | [CPU_R10000] = "R10000", |
43 | [CPU_R12000] "R12000", | 44 | [CPU_R12000] = "R12000", |
44 | [CPU_R4300] "R4300", | 45 | [CPU_R4300] = "R4300", |
45 | [CPU_R4650] "R4650", | 46 | [CPU_R4650] = "R4650", |
46 | [CPU_R4700] "R4700", | 47 | [CPU_R4700] = "R4700", |
47 | [CPU_R5000] "R5000", | 48 | [CPU_R5000] = "R5000", |
48 | [CPU_R5000A] "R5000A", | 49 | [CPU_R5000A] = "R5000A", |
49 | [CPU_R4640] "R4640", | 50 | [CPU_R4640] = "R4640", |
50 | [CPU_NEVADA] "Nevada", | 51 | [CPU_NEVADA] = "Nevada", |
51 | [CPU_RM7000] "RM7000", | 52 | [CPU_RM7000] = "RM7000", |
52 | [CPU_RM9000] "RM9000", | 53 | [CPU_RM9000] = "RM9000", |
53 | [CPU_R5432] "R5432", | 54 | [CPU_R5432] = "R5432", |
54 | [CPU_4KC] "MIPS 4Kc", | 55 | [CPU_4KC] = "MIPS 4Kc", |
55 | [CPU_5KC] "MIPS 5Kc", | 56 | [CPU_5KC] = "MIPS 5Kc", |
56 | [CPU_R4310] "R4310", | 57 | [CPU_R4310] = "R4310", |
57 | [CPU_SB1] "SiByte SB1", | 58 | [CPU_SB1] = "SiByte SB1", |
58 | [CPU_TX3912] "TX3912", | 59 | [CPU_SB1A] = "SiByte SB1A", |
59 | [CPU_TX3922] "TX3922", | 60 | [CPU_TX3912] = "TX3912", |
60 | [CPU_TX3927] "TX3927", | 61 | [CPU_TX3922] = "TX3922", |
61 | [CPU_AU1000] "Au1000", | 62 | [CPU_TX3927] = "TX3927", |
62 | [CPU_AU1500] "Au1500", | 63 | [CPU_AU1000] = "Au1000", |
63 | [CPU_4KEC] "MIPS 4KEc", | 64 | [CPU_AU1500] = "Au1500", |
64 | [CPU_4KSC] "MIPS 4KSc", | 65 | [CPU_AU1100] = "Au1100", |
65 | [CPU_VR41XX] "NEC Vr41xx", | 66 | [CPU_AU1550] = "Au1550", |
66 | [CPU_R5500] "R5500", | 67 | [CPU_AU1200] = "Au1200", |
67 | [CPU_TX49XX] "TX49xx", | 68 | [CPU_4KEC] = "MIPS 4KEc", |
68 | [CPU_20KC] "MIPS 20Kc", | 69 | [CPU_4KSC] = "MIPS 4KSc", |
69 | [CPU_24K] "MIPS 24K", | 70 | [CPU_VR41XX] = "NEC Vr41xx", |
70 | [CPU_25KF] "MIPS 25Kf", | 71 | [CPU_R5500] = "R5500", |
71 | [CPU_VR4111] "NEC VR4111", | 72 | [CPU_TX49XX] = "TX49xx", |
72 | [CPU_VR4121] "NEC VR4121", | 73 | [CPU_20KC] = "MIPS 20Kc", |
73 | [CPU_VR4122] "NEC VR4122", | 74 | [CPU_24K] = "MIPS 24K", |
74 | [CPU_VR4131] "NEC VR4131", | 75 | [CPU_25KF] = "MIPS 25Kf", |
75 | [CPU_VR4133] "NEC VR4133", | 76 | [CPU_34K] = "MIPS 34K", |
76 | [CPU_VR4181] "NEC VR4181", | 77 | [CPU_VR4111] = "NEC VR4111", |
77 | [CPU_VR4181A] "NEC VR4181A", | 78 | [CPU_VR4121] = "NEC VR4121", |
78 | [CPU_SR71000] "Sandcraft SR71000" | 79 | [CPU_VR4122] = "NEC VR4122", |
80 | [CPU_VR4131] = "NEC VR4131", | ||
81 | [CPU_VR4133] = "NEC VR4133", | ||
82 | [CPU_VR4181] = "NEC VR4181", | ||
83 | [CPU_VR4181A] = "NEC VR4181A", | ||
84 | [CPU_SR71000] = "Sandcraft SR71000", | ||
85 | [CPU_PR4450] = "Philips PR4450", | ||
79 | }; | 86 | }; |
80 | 87 | ||
81 | 88 | ||
@@ -105,8 +112,8 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
105 | (version >> 4) & 0x0f, version & 0x0f, | 112 | (version >> 4) & 0x0f, version & 0x0f, |
106 | (fp_vers >> 4) & 0x0f, fp_vers & 0x0f); | 113 | (fp_vers >> 4) & 0x0f, fp_vers & 0x0f); |
107 | seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n", | 114 | seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n", |
108 | loops_per_jiffy / (500000/HZ), | 115 | cpu_data[n].udelay_val / (500000/HZ), |
109 | (loops_per_jiffy / (5000/HZ)) % 100); | 116 | (cpu_data[n].udelay_val / (5000/HZ)) % 100); |
110 | seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no"); | 117 | seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no"); |
111 | seq_printf(m, "microsecond timers\t: %s\n", | 118 | seq_printf(m, "microsecond timers\t: %s\n", |
112 | cpu_has_counter ? "yes" : "no"); | 119 | cpu_has_counter ? "yes" : "no"); |
@@ -115,6 +122,14 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
115 | cpu_has_divec ? "yes" : "no"); | 122 | cpu_has_divec ? "yes" : "no"); |
116 | seq_printf(m, "hardware watchpoint\t: %s\n", | 123 | seq_printf(m, "hardware watchpoint\t: %s\n", |
117 | cpu_has_watch ? "yes" : "no"); | 124 | cpu_has_watch ? "yes" : "no"); |
125 | seq_printf(m, "ASEs implemented\t:%s%s%s%s%s%s\n", | ||
126 | cpu_has_mips16 ? " mips16" : "", | ||
127 | cpu_has_mdmx ? " mdmx" : "", | ||
128 | cpu_has_mips3d ? " mips3d" : "", | ||
129 | cpu_has_smartmips ? " smartmips" : "", | ||
130 | cpu_has_dsp ? " dsp" : "", | ||
131 | cpu_has_mipsmt ? " mt" : "" | ||
132 | ); | ||
118 | 133 | ||
119 | sprintf(fmt, "VCE%%c exceptions\t\t: %s\n", | 134 | sprintf(fmt, "VCE%%c exceptions\t\t: %s\n", |
120 | cpu_has_vce ? "%u" : "not available"); | 135 | cpu_has_vce ? "%u" : "not available"); |