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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2006-11-13 11:13:18 -0500
committerRalf Baechle <ralf@linux-mips.org>2006-11-29 20:14:46 -0500
commit1417836e81c0ab8f5a0bfeafa90d3eaa41b2a067 (patch)
tree0274893cb78ca2e1bb85c3eee0c07a85e0b83d04 /arch/mips/kernel/irq_cpu.c
parent1603b5aca4f15b34848fb5594d0c7b6333b99144 (diff)
[MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irq
Further incorporation of generic irq framework. Replacing __do_IRQ() by proper flow handler would make the irq handling path a bit simpler and faster. * use generic_handle_irq() instead of __do_IRQ(). * use handle_level_irq for obvious level-type irq chips. * use handle_percpu_irq for irqs marked as IRQ_PER_CPU. * setup .eoi routine for irq chips possibly used with handle_percpu_irq. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/irq_cpu.c')
-rw-r--r--arch/mips/kernel/irq_cpu.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c
index 3b7cfa407e87..be5ac23d3812 100644
--- a/arch/mips/kernel/irq_cpu.c
+++ b/arch/mips/kernel/irq_cpu.c
@@ -62,6 +62,7 @@ static struct irq_chip mips_cpu_irq_controller = {
62 .mask = mask_mips_irq, 62 .mask = mask_mips_irq,
63 .mask_ack = mask_mips_irq, 63 .mask_ack = mask_mips_irq,
64 .unmask = unmask_mips_irq, 64 .unmask = unmask_mips_irq,
65 .eoi = unmask_mips_irq,
65 .end = mips_cpu_irq_end, 66 .end = mips_cpu_irq_end,
66}; 67};
67 68
@@ -104,6 +105,7 @@ static struct irq_chip mips_mt_cpu_irq_controller = {
104 .mask = mask_mips_mt_irq, 105 .mask = mask_mips_mt_irq,
105 .mask_ack = mips_mt_cpu_irq_ack, 106 .mask_ack = mips_mt_cpu_irq_ack,
106 .unmask = unmask_mips_mt_irq, 107 .unmask = unmask_mips_mt_irq,
108 .eoi = unmask_mips_mt_irq,
107 .end = mips_mt_cpu_irq_end, 109 .end = mips_mt_cpu_irq_end,
108}; 110};
109 111
@@ -124,7 +126,8 @@ void __init mips_cpu_irq_init(int irq_base)
124 set_irq_chip(i, &mips_mt_cpu_irq_controller); 126 set_irq_chip(i, &mips_mt_cpu_irq_controller);
125 127
126 for (i = irq_base + 2; i < irq_base + 8; i++) 128 for (i = irq_base + 2; i < irq_base + 8; i++)
127 set_irq_chip(i, &mips_cpu_irq_controller); 129 set_irq_chip_and_handler(i, &mips_cpu_irq_controller,
130 handle_level_irq);
128 131
129 mips_cpu_irq_base = irq_base; 132 mips_cpu_irq_base = irq_base;
130} 133}