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authorLinus Torvalds <torvalds@woody.osdl.org>2006-12-01 19:44:02 -0500
committerLinus Torvalds <torvalds@woody.osdl.org>2006-12-01 19:44:02 -0500
commitc3e59d1e891f6140a346de2b8547e25133c716b0 (patch)
treeb2a669f625009a3a33f20f648bd654637323d296 /arch/mips/kernel/irq-rm7000.c
parentb07e3c3a1db0ce399d2a1d04860e1b901927c05e (diff)
parentaa414dff4f7bef29457592414551becdca72dd6b (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (31 commits) [MIPS] Remove duplicate ISA DMA code for 0 DMA channel case. [MIPS] Remove unused definition of cpu_to_lelongp() [MIPS] Remove userspace proofing from <asm/bitops.h>. [MIPS] Remove old junk left from old atomic_lock. [MIPS] Use conditional traps for BUG_ON on MIPS II and better. [MIPS] mips HPT cleanup: make clocksource_mips public [MIPS] do_IRQ cleanup [MIPS] Avoid dupliate D-cache flush on R400C / R4400 SC and MC variants. [MIPS] Remove redundant r4k_blast_icache() calls [MIPS] Work around bogus gcc warnings. [MIPS] Fix double inclusions [MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irq [MIPS] IRQ cleanups [MIPS] mips hpt cleanup: get rid of mips_hpt_init [MIPS] PB1200: Remove duplicate definitions [MIPS] Fix alignment hole in struct cache_desc; shrink struct. [MIPS] Oprofile: kernel support for the R10000. [MIPS] Remove unused R10000 performance counter definitions. [MIPS] Add support for kexec [MIPS] Don't print presence of WAIT instruction on bootup. ...
Diffstat (limited to 'arch/mips/kernel/irq-rm7000.c')
-rw-r--r--arch/mips/kernel/irq-rm7000.c54
1 files changed, 7 insertions, 47 deletions
diff --git a/arch/mips/kernel/irq-rm7000.c b/arch/mips/kernel/irq-rm7000.c
index 6b54c7109e2e..ddcc2a5f8a06 100644
--- a/arch/mips/kernel/irq-rm7000.c
+++ b/arch/mips/kernel/irq-rm7000.c
@@ -29,42 +29,6 @@ static inline void mask_rm7k_irq(unsigned int irq)
29 clear_c0_intcontrol(0x100 << (irq - irq_base)); 29 clear_c0_intcontrol(0x100 << (irq - irq_base));
30} 30}
31 31
32static inline void rm7k_cpu_irq_enable(unsigned int irq)
33{
34 unsigned long flags;
35
36 local_irq_save(flags);
37 unmask_rm7k_irq(irq);
38 local_irq_restore(flags);
39}
40
41static void rm7k_cpu_irq_disable(unsigned int irq)
42{
43 unsigned long flags;
44
45 local_irq_save(flags);
46 mask_rm7k_irq(irq);
47 local_irq_restore(flags);
48}
49
50static unsigned int rm7k_cpu_irq_startup(unsigned int irq)
51{
52 rm7k_cpu_irq_enable(irq);
53
54 return 0;
55}
56
57#define rm7k_cpu_irq_shutdown rm7k_cpu_irq_disable
58
59/*
60 * While we ack the interrupt interrupts are disabled and thus we don't need
61 * to deal with concurrency issues. Same for rm7k_cpu_irq_end.
62 */
63static void rm7k_cpu_irq_ack(unsigned int irq)
64{
65 mask_rm7k_irq(irq);
66}
67
68static void rm7k_cpu_irq_end(unsigned int irq) 32static void rm7k_cpu_irq_end(unsigned int irq)
69{ 33{
70 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) 34 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
@@ -73,11 +37,10 @@ static void rm7k_cpu_irq_end(unsigned int irq)
73 37
74static struct irq_chip rm7k_irq_controller = { 38static struct irq_chip rm7k_irq_controller = {
75 .typename = "RM7000", 39 .typename = "RM7000",
76 .startup = rm7k_cpu_irq_startup, 40 .ack = mask_rm7k_irq,
77 .shutdown = rm7k_cpu_irq_shutdown, 41 .mask = mask_rm7k_irq,
78 .enable = rm7k_cpu_irq_enable, 42 .mask_ack = mask_rm7k_irq,
79 .disable = rm7k_cpu_irq_disable, 43 .unmask = unmask_rm7k_irq,
80 .ack = rm7k_cpu_irq_ack,
81 .end = rm7k_cpu_irq_end, 44 .end = rm7k_cpu_irq_end,
82}; 45};
83 46
@@ -87,12 +50,9 @@ void __init rm7k_cpu_irq_init(int base)
87 50
88 clear_c0_intcontrol(0x00000f00); /* Mask all */ 51 clear_c0_intcontrol(0x00000f00); /* Mask all */
89 52
90 for (i = base; i < base + 4; i++) { 53 for (i = base; i < base + 4; i++)
91 irq_desc[i].status = IRQ_DISABLED; 54 set_irq_chip_and_handler(i, &rm7k_irq_controller,
92 irq_desc[i].action = NULL; 55 handle_level_irq);
93 irq_desc[i].depth = 1;
94 irq_desc[i].chip = &rm7k_irq_controller;
95 }
96 56
97 irq_base = base; 57 irq_base = base;
98} 58}