diff options
author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2006-11-13 11:13:18 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2006-11-29 20:14:46 -0500 |
commit | 1417836e81c0ab8f5a0bfeafa90d3eaa41b2a067 (patch) | |
tree | 0274893cb78ca2e1bb85c3eee0c07a85e0b83d04 /arch/mips/kernel/irq-msc01.c | |
parent | 1603b5aca4f15b34848fb5594d0c7b6333b99144 (diff) |
[MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irq
Further incorporation of generic irq framework. Replacing __do_IRQ()
by proper flow handler would make the irq handling path a bit simpler
and faster.
* use generic_handle_irq() instead of __do_IRQ().
* use handle_level_irq for obvious level-type irq chips.
* use handle_percpu_irq for irqs marked as IRQ_PER_CPU.
* setup .eoi routine for irq chips possibly used with handle_percpu_irq.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/irq-msc01.c')
-rw-r--r-- | arch/mips/kernel/irq-msc01.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c index e1880b27381b..bcaad6696082 100644 --- a/arch/mips/kernel/irq-msc01.c +++ b/arch/mips/kernel/irq-msc01.c | |||
@@ -117,6 +117,7 @@ struct irq_chip msc_levelirq_type = { | |||
117 | .mask = mask_msc_irq, | 117 | .mask = mask_msc_irq, |
118 | .mask_ack = level_mask_and_ack_msc_irq, | 118 | .mask_ack = level_mask_and_ack_msc_irq, |
119 | .unmask = unmask_msc_irq, | 119 | .unmask = unmask_msc_irq, |
120 | .eoi = unmask_msc_irq, | ||
120 | .end = end_msc_irq, | 121 | .end = end_msc_irq, |
121 | }; | 122 | }; |
122 | 123 | ||
@@ -126,6 +127,7 @@ struct irq_chip msc_edgeirq_type = { | |||
126 | .mask = mask_msc_irq, | 127 | .mask = mask_msc_irq, |
127 | .mask_ack = edge_mask_and_ack_msc_irq, | 128 | .mask_ack = edge_mask_and_ack_msc_irq, |
128 | .unmask = unmask_msc_irq, | 129 | .unmask = unmask_msc_irq, |
130 | .eoi = unmask_msc_irq, | ||
129 | .end = end_msc_irq, | 131 | .end = end_msc_irq, |
130 | }; | 132 | }; |
131 | 133 | ||