diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2009-03-30 08:49:44 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2009-03-30 08:49:44 -0400 |
commit | c87e09096dcd1ea3da8dfe434ee694fac51031c8 (patch) | |
tree | d988b5b545173c79ac013977720d62c7d26ec337 /arch/mips/kernel/irq-msc01.c | |
parent | 3e168ae286f5203d4b4aae0ae15c0d6282bcdd21 (diff) |
MIPS: Enable GENERIC_HARDIRQS_NO__DO_IRQ for all platforms
__do_IRQ() is deprecated and will go away.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/irq-msc01.c')
-rw-r--r-- | arch/mips/kernel/irq-msc01.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c index 963c16d266ab..6a8cd28133d5 100644 --- a/arch/mips/kernel/irq-msc01.c +++ b/arch/mips/kernel/irq-msc01.c | |||
@@ -140,14 +140,16 @@ void __init init_msc_irqs(unsigned long icubase, unsigned int irqbase, msc_irqma | |||
140 | 140 | ||
141 | switch (imp->im_type) { | 141 | switch (imp->im_type) { |
142 | case MSC01_IRQ_EDGE: | 142 | case MSC01_IRQ_EDGE: |
143 | set_irq_chip(irqbase+n, &msc_edgeirq_type); | 143 | set_irq_chip_and_handler_name(irqbase + n, |
144 | &msc_edgeirq_type, handle_edge_irq, "edge"); | ||
144 | if (cpu_has_veic) | 145 | if (cpu_has_veic) |
145 | MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT); | 146 | MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT); |
146 | else | 147 | else |
147 | MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl); | 148 | MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl); |
148 | break; | 149 | break; |
149 | case MSC01_IRQ_LEVEL: | 150 | case MSC01_IRQ_LEVEL: |
150 | set_irq_chip(irqbase+n, &msc_levelirq_type); | 151 | set_irq_chip_and_handler_name(irqbase+n, |
152 | &msc_levelirq_type, handle_level_irq, "level"); | ||
151 | if (cpu_has_veic) | 153 | if (cpu_has_veic) |
152 | MSCIC_WRITE(MSC01_IC_SUP+n*8, 0); | 154 | MSCIC_WRITE(MSC01_IC_SUP+n*8, 0); |
153 | else | 155 | else |