MIPS: allow GIC clockevent device config from other CPUs

This patch allows the GIC clockevent device for a CPU to be configured
by another CPU. This makes GIC clockevent devices suitable for use as
the tick broadcast device, where formerly the GIC timer local to the
configuring CPU would have been configured incorrectly.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>

1 files changed, 15 insertions, 0 deletions

diff --git a/arch/mips/kernel/irq-gic.c b/arch/mips/kernel/irq-gic.c
index 8520dad6d4e3..88e4c323382c 100644
--- a/arch/mips/kernel/irq-gic.c
+++ b/arch/mips/kernel/irq-gic.c
@@ -54,6 +54,21 @@ void gic_write_compare(cycle_t cnt)
                                 (int)(cnt & 0xffffffff));
 }
 
+void gic_write_cpu_compare(cycle_t cnt, int cpu)
+{
+        unsigned long flags;
+
+        local_irq_save(flags);
+
+        GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR), cpu);
+        GICWRITE(GIC_REG(VPE_OTHER, GIC_VPE_COMPARE_HI),
+                                (int)(cnt >> 32));
+        GICWRITE(GIC_REG(VPE_OTHER, GIC_VPE_COMPARE_LO),
+                                (int)(cnt & 0xffffffff));
+
+        local_irq_restore(flags);
+}
+
 cycle_t gic_read_compare(void)
 {
         unsigned int hi, lo;