diff options
author | Jiri Kosina <jkosina@suse.cz> | 2011-04-26 04:22:15 -0400 |
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committer | Jiri Kosina <jkosina@suse.cz> | 2011-04-26 04:22:59 -0400 |
commit | 07f9479a40cc778bc1462ada11f95b01360ae4ff (patch) | |
tree | 0676cf38df3844004bb3ebfd99dfa67a4a8998f5 /arch/mips/kernel/i8259.c | |
parent | 9d5e6bdb3013acfb311ab407eeca0b6a6a3dedbf (diff) | |
parent | cd2e49e90f1cae7726c9a2c54488d881d7f1cd1c (diff) |
Merge branch 'master' into for-next
Fast-forwarded to current state of Linus' tree as there are patches to be
applied for files that didn't exist on the old branch.
Diffstat (limited to 'arch/mips/kernel/i8259.c')
-rw-r--r-- | arch/mips/kernel/i8259.c | 43 |
1 files changed, 20 insertions, 23 deletions
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c index c58176cc796b..c018696765d4 100644 --- a/arch/mips/kernel/i8259.c +++ b/arch/mips/kernel/i8259.c | |||
@@ -31,19 +31,19 @@ | |||
31 | 31 | ||
32 | static int i8259A_auto_eoi = -1; | 32 | static int i8259A_auto_eoi = -1; |
33 | DEFINE_RAW_SPINLOCK(i8259A_lock); | 33 | DEFINE_RAW_SPINLOCK(i8259A_lock); |
34 | static void disable_8259A_irq(unsigned int irq); | 34 | static void disable_8259A_irq(struct irq_data *d); |
35 | static void enable_8259A_irq(unsigned int irq); | 35 | static void enable_8259A_irq(struct irq_data *d); |
36 | static void mask_and_ack_8259A(unsigned int irq); | 36 | static void mask_and_ack_8259A(struct irq_data *d); |
37 | static void init_8259A(int auto_eoi); | 37 | static void init_8259A(int auto_eoi); |
38 | 38 | ||
39 | static struct irq_chip i8259A_chip = { | 39 | static struct irq_chip i8259A_chip = { |
40 | .name = "XT-PIC", | 40 | .name = "XT-PIC", |
41 | .mask = disable_8259A_irq, | 41 | .irq_mask = disable_8259A_irq, |
42 | .disable = disable_8259A_irq, | 42 | .irq_disable = disable_8259A_irq, |
43 | .unmask = enable_8259A_irq, | 43 | .irq_unmask = enable_8259A_irq, |
44 | .mask_ack = mask_and_ack_8259A, | 44 | .irq_mask_ack = mask_and_ack_8259A, |
45 | #ifdef CONFIG_MIPS_MT_SMTC_IRQAFF | 45 | #ifdef CONFIG_MIPS_MT_SMTC_IRQAFF |
46 | .set_affinity = plat_set_irq_affinity, | 46 | .irq_set_affinity = plat_set_irq_affinity, |
47 | #endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */ | 47 | #endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */ |
48 | }; | 48 | }; |
49 | 49 | ||
@@ -59,12 +59,11 @@ static unsigned int cached_irq_mask = 0xffff; | |||
59 | #define cached_master_mask (cached_irq_mask) | 59 | #define cached_master_mask (cached_irq_mask) |
60 | #define cached_slave_mask (cached_irq_mask >> 8) | 60 | #define cached_slave_mask (cached_irq_mask >> 8) |
61 | 61 | ||
62 | static void disable_8259A_irq(unsigned int irq) | 62 | static void disable_8259A_irq(struct irq_data *d) |
63 | { | 63 | { |
64 | unsigned int mask; | 64 | unsigned int mask, irq = d->irq - I8259A_IRQ_BASE; |
65 | unsigned long flags; | 65 | unsigned long flags; |
66 | 66 | ||
67 | irq -= I8259A_IRQ_BASE; | ||
68 | mask = 1 << irq; | 67 | mask = 1 << irq; |
69 | raw_spin_lock_irqsave(&i8259A_lock, flags); | 68 | raw_spin_lock_irqsave(&i8259A_lock, flags); |
70 | cached_irq_mask |= mask; | 69 | cached_irq_mask |= mask; |
@@ -75,12 +74,11 @@ static void disable_8259A_irq(unsigned int irq) | |||
75 | raw_spin_unlock_irqrestore(&i8259A_lock, flags); | 74 | raw_spin_unlock_irqrestore(&i8259A_lock, flags); |
76 | } | 75 | } |
77 | 76 | ||
78 | static void enable_8259A_irq(unsigned int irq) | 77 | static void enable_8259A_irq(struct irq_data *d) |
79 | { | 78 | { |
80 | unsigned int mask; | 79 | unsigned int mask, irq = d->irq - I8259A_IRQ_BASE; |
81 | unsigned long flags; | 80 | unsigned long flags; |
82 | 81 | ||
83 | irq -= I8259A_IRQ_BASE; | ||
84 | mask = ~(1 << irq); | 82 | mask = ~(1 << irq); |
85 | raw_spin_lock_irqsave(&i8259A_lock, flags); | 83 | raw_spin_lock_irqsave(&i8259A_lock, flags); |
86 | cached_irq_mask &= mask; | 84 | cached_irq_mask &= mask; |
@@ -112,7 +110,7 @@ int i8259A_irq_pending(unsigned int irq) | |||
112 | void make_8259A_irq(unsigned int irq) | 110 | void make_8259A_irq(unsigned int irq) |
113 | { | 111 | { |
114 | disable_irq_nosync(irq); | 112 | disable_irq_nosync(irq); |
115 | set_irq_chip_and_handler(irq, &i8259A_chip, handle_level_irq); | 113 | irq_set_chip_and_handler(irq, &i8259A_chip, handle_level_irq); |
116 | enable_irq(irq); | 114 | enable_irq(irq); |
117 | } | 115 | } |
118 | 116 | ||
@@ -145,12 +143,11 @@ static inline int i8259A_irq_real(unsigned int irq) | |||
145 | * first, _then_ send the EOI, and the order of EOI | 143 | * first, _then_ send the EOI, and the order of EOI |
146 | * to the two 8259s is important! | 144 | * to the two 8259s is important! |
147 | */ | 145 | */ |
148 | static void mask_and_ack_8259A(unsigned int irq) | 146 | static void mask_and_ack_8259A(struct irq_data *d) |
149 | { | 147 | { |
150 | unsigned int irqmask; | 148 | unsigned int irqmask, irq = d->irq - I8259A_IRQ_BASE; |
151 | unsigned long flags; | 149 | unsigned long flags; |
152 | 150 | ||
153 | irq -= I8259A_IRQ_BASE; | ||
154 | irqmask = 1 << irq; | 151 | irqmask = 1 << irq; |
155 | raw_spin_lock_irqsave(&i8259A_lock, flags); | 152 | raw_spin_lock_irqsave(&i8259A_lock, flags); |
156 | /* | 153 | /* |
@@ -290,9 +287,9 @@ static void init_8259A(int auto_eoi) | |||
290 | * In AEOI mode we just have to mask the interrupt | 287 | * In AEOI mode we just have to mask the interrupt |
291 | * when acking. | 288 | * when acking. |
292 | */ | 289 | */ |
293 | i8259A_chip.mask_ack = disable_8259A_irq; | 290 | i8259A_chip.irq_mask_ack = disable_8259A_irq; |
294 | else | 291 | else |
295 | i8259A_chip.mask_ack = mask_and_ack_8259A; | 292 | i8259A_chip.irq_mask_ack = mask_and_ack_8259A; |
296 | 293 | ||
297 | udelay(100); /* wait for 8259A to initialize */ | 294 | udelay(100); /* wait for 8259A to initialize */ |
298 | 295 | ||
@@ -339,8 +336,8 @@ void __init init_i8259_irqs(void) | |||
339 | init_8259A(0); | 336 | init_8259A(0); |
340 | 337 | ||
341 | for (i = I8259A_IRQ_BASE; i < I8259A_IRQ_BASE + 16; i++) { | 338 | for (i = I8259A_IRQ_BASE; i < I8259A_IRQ_BASE + 16; i++) { |
342 | set_irq_chip_and_handler(i, &i8259A_chip, handle_level_irq); | 339 | irq_set_chip_and_handler(i, &i8259A_chip, handle_level_irq); |
343 | set_irq_probe(i); | 340 | irq_set_probe(i); |
344 | } | 341 | } |
345 | 342 | ||
346 | setup_irq(I8259A_IRQ_BASE + PIC_CASCADE_IR, &irq2); | 343 | setup_irq(I8259A_IRQ_BASE + PIC_CASCADE_IR, &irq2); |