diff options
author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2007-01-14 09:41:42 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2007-02-06 11:53:09 -0500 |
commit | 2fa7937bd8922e1fe4aae6a45e7e787fa45d6043 (patch) | |
tree | 05465b7aa2b1e165320a2b938d0f757c7a893265 /arch/mips/kernel/i8259.c | |
parent | 97dcb82de6cc99a5669eb8e342efc24cceb1e77e (diff) |
[MIPS] Make I8259A_IRQ_BASE customizable
Move I8259A_IRQ_BASE from asm/i8259.h to asm/mach-generic/irq.h and
make it really customizable. And remove I8259_IRQ_BASE declared on
some platforms. Currently only NEC_CMBVR4133 is using custom
I8259A_IRQ_BASE value.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/i8259.c')
-rw-r--r-- | arch/mips/kernel/i8259.c | 20 |
1 files changed, 14 insertions, 6 deletions
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c index b59a676c6d0e..91de4223d638 100644 --- a/arch/mips/kernel/i8259.c +++ b/arch/mips/kernel/i8259.c | |||
@@ -54,9 +54,11 @@ static unsigned int cached_irq_mask = 0xffff; | |||
54 | 54 | ||
55 | void disable_8259A_irq(unsigned int irq) | 55 | void disable_8259A_irq(unsigned int irq) |
56 | { | 56 | { |
57 | unsigned int mask = 1 << irq; | 57 | unsigned int mask; |
58 | unsigned long flags; | 58 | unsigned long flags; |
59 | 59 | ||
60 | irq -= I8259A_IRQ_BASE; | ||
61 | mask = 1 << irq; | ||
60 | spin_lock_irqsave(&i8259A_lock, flags); | 62 | spin_lock_irqsave(&i8259A_lock, flags); |
61 | cached_irq_mask |= mask; | 63 | cached_irq_mask |= mask; |
62 | if (irq & 8) | 64 | if (irq & 8) |
@@ -68,9 +70,11 @@ void disable_8259A_irq(unsigned int irq) | |||
68 | 70 | ||
69 | void enable_8259A_irq(unsigned int irq) | 71 | void enable_8259A_irq(unsigned int irq) |
70 | { | 72 | { |
71 | unsigned int mask = ~(1 << irq); | 73 | unsigned int mask; |
72 | unsigned long flags; | 74 | unsigned long flags; |
73 | 75 | ||
76 | irq -= I8259A_IRQ_BASE; | ||
77 | mask = ~(1 << irq); | ||
74 | spin_lock_irqsave(&i8259A_lock, flags); | 78 | spin_lock_irqsave(&i8259A_lock, flags); |
75 | cached_irq_mask &= mask; | 79 | cached_irq_mask &= mask; |
76 | if (irq & 8) | 80 | if (irq & 8) |
@@ -82,10 +86,12 @@ void enable_8259A_irq(unsigned int irq) | |||
82 | 86 | ||
83 | int i8259A_irq_pending(unsigned int irq) | 87 | int i8259A_irq_pending(unsigned int irq) |
84 | { | 88 | { |
85 | unsigned int mask = 1 << irq; | 89 | unsigned int mask; |
86 | unsigned long flags; | 90 | unsigned long flags; |
87 | int ret; | 91 | int ret; |
88 | 92 | ||
93 | irq -= I8259A_IRQ_BASE; | ||
94 | mask = 1 << irq; | ||
89 | spin_lock_irqsave(&i8259A_lock, flags); | 95 | spin_lock_irqsave(&i8259A_lock, flags); |
90 | if (irq < 8) | 96 | if (irq < 8) |
91 | ret = inb(PIC_MASTER_CMD) & mask; | 97 | ret = inb(PIC_MASTER_CMD) & mask; |
@@ -134,9 +140,11 @@ static inline int i8259A_irq_real(unsigned int irq) | |||
134 | */ | 140 | */ |
135 | void mask_and_ack_8259A(unsigned int irq) | 141 | void mask_and_ack_8259A(unsigned int irq) |
136 | { | 142 | { |
137 | unsigned int irqmask = 1 << irq; | 143 | unsigned int irqmask; |
138 | unsigned long flags; | 144 | unsigned long flags; |
139 | 145 | ||
146 | irq -= I8259A_IRQ_BASE; | ||
147 | irqmask = 1 << irq; | ||
140 | spin_lock_irqsave(&i8259A_lock, flags); | 148 | spin_lock_irqsave(&i8259A_lock, flags); |
141 | /* | 149 | /* |
142 | * Lightweight spurious IRQ detection. We do not want | 150 | * Lightweight spurious IRQ detection. We do not want |
@@ -322,8 +330,8 @@ void __init init_i8259_irqs (void) | |||
322 | 330 | ||
323 | init_8259A(0); | 331 | init_8259A(0); |
324 | 332 | ||
325 | for (i = 0; i < 16; i++) | 333 | for (i = I8259A_IRQ_BASE; i < I8259A_IRQ_BASE + 16; i++) |
326 | set_irq_chip_and_handler(i, &i8259A_chip, handle_level_irq); | 334 | set_irq_chip_and_handler(i, &i8259A_chip, handle_level_irq); |
327 | 335 | ||
328 | setup_irq(PIC_CASCADE_IR, &irq2); | 336 | setup_irq(I8259A_IRQ_BASE + PIC_CASCADE_IR, &irq2); |
329 | } | 337 | } |