diff options
author | Thiemo Seufer <ths@networkno.de> | 2004-12-08 05:32:45 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2005-10-29 14:30:15 -0400 |
commit | 69903d6500c73af8329a5fba7153b0d50748981c (patch) | |
tree | d77624da0c4f7fab47e3ea5ab51e8a45b89d2909 /arch/mips/kernel/genex.S | |
parent | b59a9504cb93db7fae31e60760725d48652a1fc3 (diff) |
Fix typos and formatting.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/genex.S')
-rw-r--r-- | arch/mips/kernel/genex.S | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S index e7f6c1b90806..e5021c758ef0 100644 --- a/arch/mips/kernel/genex.S +++ b/arch/mips/kernel/genex.S | |||
@@ -82,7 +82,7 @@ NESTED(except_vec3_r4000, 0, sp) | |||
82 | li k0, 14<<2 | 82 | li k0, 14<<2 |
83 | beq k1, k0, handle_vcei | 83 | beq k1, k0, handle_vcei |
84 | #ifdef CONFIG_64BIT | 84 | #ifdef CONFIG_64BIT |
85 | dsll k1, k1, 1 | 85 | dsll k1, k1, 1 |
86 | #endif | 86 | #endif |
87 | .set pop | 87 | .set pop |
88 | PTR_L k0, exception_handlers(k1) | 88 | PTR_L k0, exception_handlers(k1) |
@@ -90,17 +90,17 @@ NESTED(except_vec3_r4000, 0, sp) | |||
90 | 90 | ||
91 | /* | 91 | /* |
92 | * Big shit, we now may have two dirty primary cache lines for the same | 92 | * Big shit, we now may have two dirty primary cache lines for the same |
93 | * physical address. We can savely invalidate the line pointed to by | 93 | * physical address. We can safely invalidate the line pointed to by |
94 | * c0_badvaddr because after return from this exception handler the | 94 | * c0_badvaddr because after return from this exception handler the |
95 | * load / store will be re-executed. | 95 | * load / store will be re-executed. |
96 | */ | 96 | */ |
97 | handle_vced: | 97 | handle_vced: |
98 | DMFC0 k0, CP0_BADVADDR | 98 | MFC0 k0, CP0_BADVADDR |
99 | li k1, -4 # Is this ... | 99 | li k1, -4 # Is this ... |
100 | and k0, k1 # ... really needed? | 100 | and k0, k1 # ... really needed? |
101 | mtc0 zero, CP0_TAGLO | 101 | mtc0 zero, CP0_TAGLO |
102 | cache Index_Store_Tag_D,(k0) | 102 | cache Index_Store_Tag_D, (k0) |
103 | cache Hit_Writeback_Inv_SD,(k0) | 103 | cache Hit_Writeback_Inv_SD, (k0) |
104 | #ifdef CONFIG_PROC_FS | 104 | #ifdef CONFIG_PROC_FS |
105 | PTR_LA k0, vced_count | 105 | PTR_LA k0, vced_count |
106 | lw k1, (k0) | 106 | lw k1, (k0) |