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authorChris Dearman <chris@mips.com>2007-03-26 09:48:50 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-03-29 18:46:35 -0400
commitfe99f1b184efb75c50dd8cbdfff99b559c2cb3b3 (patch)
tree7baefefa620815b1d585af092e87c03a5ffdda17 /arch/mips/kernel/genex.S
parentcbde5ebc972c0577741a69c85d5e5afad19d813b (diff)
[MIPS] lockdep: Deal with interrupt disable hazard in TRACE_IRQFLAGS
Between the mtc0 or di instruction that disables interrupts and the following hazard barrier a processor may still take interrupts. If an interrupt is taken after interrupts are disabled but before the state is updated it will appear to restore_all that it is incorrectly returning with interrupts disabled. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/genex.S')
-rw-r--r--arch/mips/kernel/genex.S31
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index 83843a229be7..297bd56c2347 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -128,6 +128,37 @@ handle_vcei:
128 128
129 .align 5 129 .align 5
130NESTED(handle_int, PT_SIZE, sp) 130NESTED(handle_int, PT_SIZE, sp)
131#ifdef CONFIG_TRACE_IRQFLAGS
132 /*
133 * Check to see if the interrupted code has just disabled
134 * interrupts and ignore this interrupt for now if so.
135 *
136 * local_irq_disable() disables interrupts and then calls
137 * trace_hardirqs_off() to track the state. If an interrupt is taken
138 * after interrupts are disabled but before the state is updated
139 * it will appear to restore_all that it is incorrectly returning with
140 * interrupts disabled
141 */
142 .set push
143 .set noat
144 mfc0 k0, CP0_STATUS
145#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
146 and k0, ST0_IEP
147 bnez k0, 1f
148
149 mfc0 k0, EP0_EPC
150 .set noreorder
151 j k0
152 rfe
153#else
154 and k0, ST0_IE
155 bnez k0, 1f
156
157 eret
158#endif
1591:
160 .set pop
161#endif
131 SAVE_ALL 162 SAVE_ALL
132 CLI 163 CLI
133 TRACE_IRQS_OFF 164 TRACE_IRQS_OFF