[MIPS] MT: Improved multithreading support.

    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 29 insertions, 0 deletions

diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index 04418b6568b0..ff7af369f286 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -12,6 +12,7 @@
 #include <linux/init.h>
 
 #include <asm/asm.h>
+#include <asm/asmmacro.h>
 #include <asm/cacheops.h>
 #include <asm/regdef.h>
 #include <asm/fpregdef.h>
@@ -171,6 +172,15 @@ NESTED(except_vec_vi, 0, sp)
         SAVE_AT
         .set    push
         .set    noreorder
+#ifdef CONFIG_MIPS_MT_SMTC
+        /*
+         * To keep from blindly blocking *all* interrupts
+         * during service by SMTC kernel, we also want to
+         * pass the IM value to be cleared.
+         */
+EXPORT(except_vec_vi_mori)
+        ori     a0, $0, 0
+#endif /* CONFIG_MIPS_MT_SMTC */
 EXPORT(except_vec_vi_lui)
         lui     v0, 0           /* Patched */
         j       except_vec_vi_handler
@@ -187,6 +197,25 @@ EXPORT(except_vec_vi_end)
 NESTED(except_vec_vi_handler, 0, sp)
         SAVE_TEMP
         SAVE_STATIC
+#ifdef CONFIG_MIPS_MT_SMTC
+        /*
+         * SMTC has an interesting problem that interrupts are level-triggered,
+         * and the CLI macro will clear EXL, potentially causing a duplicate
+         * interrupt service invocation. So we need to clear the associated
+         * IM bit of Status prior to doing CLI, and restore it after the
+         * service routine has been invoked - we must assume that the
+         * service routine will have cleared the state, and any active
+         * level represents a new or otherwised unserviced event...
+         */
+        mfc0    t1, CP0_STATUS
+        and     t0, a0, t1
+        mfc0    t2, CP0_TCCONTEXT
+        or      t0, t0, t2
+        mtc0    t0, CP0_TCCONTEXT
+        xor     t1, t1, t0
+        mtc0    t1, CP0_STATUS
+        ehb
+#endif /* CONFIG_MIPS_MT_SMTC */
         CLI
         move    a0, sp
         jalr    v0