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authorChris Dearman <chris@mips.com>2007-03-26 09:47:06 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-03-29 18:46:35 -0400
commitcbde5ebc972c0577741a69c85d5e5afad19d813b (patch)
tree493a2f04b81bc20ba3e823b58d28b3031f2a08df /arch/mips/kernel/entry.S
parenteb541cb24078eae83b9ef0573af36347d8dc01ee (diff)
[MIPS] lockdep: Handle interrupts in R3000 style c0_status register.
Check the IEP bit for R3000 style processors when checking to see if interrupts will be reenabled in restore_all. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/entry.S')
-rw-r--r--arch/mips/kernel/entry.S6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index 0b78fcbf044a..686249c5c328 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -121,7 +121,11 @@ FEXPORT(restore_partial) # restore partial frame
121 SAVE_AT 121 SAVE_AT
122 SAVE_TEMP 122 SAVE_TEMP
123 LONG_L v0, PT_STATUS(sp) 123 LONG_L v0, PT_STATUS(sp)
124 and v0, 1 124#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
125 and v0, ST0_IEP
126#else
127 and v0, ST0_IE
128#endif
125 beqz v0, 1f 129 beqz v0, 1f
126 jal trace_hardirqs_on 130 jal trace_hardirqs_on
127 b 2f 131 b 2f