MIPS: Loongson 2: Sort out clock managment.

For unexplainable reasons the Loongson 2 clock API was implemented in a
module so fixing this involved shifting large amounts of code around.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 20 insertions, 1 deletions

diff --git a/arch/mips/kernel/cpufreq/loongson2_cpufreq.c b/arch/mips/kernel/cpufreq/loongson2_cpufreq.c
index ae5db206347c..e7c98e2b78b6 100644
--- a/arch/mips/kernel/cpufreq/loongson2_cpufreq.c
+++ b/arch/mips/kernel/cpufreq/loongson2_cpufreq.c
@@ -19,7 +19,7 @@
 
 #include <asm/clock.h>
 
-#include <loongson.h>
+#include <asm/mach-loongson/loongson.h>
 
 static uint nowait;
 
@@ -181,6 +181,25 @@ static struct platform_driver platform_driver = {
         .id_table = platform_device_ids,
 };
 
+/*
+ * This is the simple version of Loongson-2 wait, Maybe we need do this in
+ * interrupt disabled context.
+ */
+
+static DEFINE_SPINLOCK(loongson2_wait_lock);
+
+static void loongson2_cpu_wait(void)
+{
+        unsigned long flags;
+        u32 cpu_freq;
+
+        spin_lock_irqsave(&loongson2_wait_lock, flags);
+        cpu_freq = LOONGSON_CHIPCFG0;
+        LOONGSON_CHIPCFG0 &= ~0x7;      /* Put CPU into wait mode */
+        LOONGSON_CHIPCFG0 = cpu_freq;   /* Restore CPU state */
+        spin_unlock_irqrestore(&loongson2_wait_lock, flags);
+}
+
 static int __init cpufreq_init(void)
 {
         int ret;