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authorMarkos Chandras <markos.chandras@imgtec.com>2014-07-14 07:46:13 -0400
committerRalf Baechle <ralf@linux-mips.org>2014-08-01 18:06:39 -0400
commit3d528b326d7da8e28ec62c2ff1a92e85d93af098 (patch)
treebb56b98d03cbf33c0f07f6d3c3e3234101eb11f1 /arch/mips/kernel/cpu-probe.c
parent87d08bc94cd058d3493e9443bf00d7889491011f (diff)
MIPS: kernel: cpu-probe: Add support for the HardWare Table Walker
Detect if the core implements the HTW and set the option accordingly. Also, add a new kernel parameter called 'nohtw' allowing the user to disable the htw support and fallback to the software refill handler. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/7335/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/cpu-probe.c')
-rw-r--r--arch/mips/kernel/cpu-probe.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 2d2e2877b1ea..0d30433db54b 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -54,6 +54,20 @@ static int __init dsp_disable(char *s)
54 54
55__setup("nodsp", dsp_disable); 55__setup("nodsp", dsp_disable);
56 56
57static int mips_htw_disabled;
58
59static int __init htw_disable(char *s)
60{
61 mips_htw_disabled = 1;
62 cpu_data[0].options &= ~MIPS_CPU_HTW;
63 write_c0_pwctl(read_c0_pwctl() &
64 ~(1 << MIPS_PWCTL_PWEN_SHIFT));
65
66 return 1;
67}
68
69__setup("nohtw", htw_disable);
70
57static inline void check_errata(void) 71static inline void check_errata(void)
58{ 72{
59 struct cpuinfo_mips *c = &current_cpu_data; 73 struct cpuinfo_mips *c = &current_cpu_data;
@@ -321,6 +335,9 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c)
321 c->options |= MIPS_CPU_SEGMENTS; 335 c->options |= MIPS_CPU_SEGMENTS;
322 if (config3 & MIPS_CONF3_MSA) 336 if (config3 & MIPS_CONF3_MSA)
323 c->ases |= MIPS_ASE_MSA; 337 c->ases |= MIPS_ASE_MSA;
338 /* Only tested on 32-bit cores */
339 if ((config3 & MIPS_CONF3_PW) && config_enabled(CONFIG_32BIT))
340 c->options |= MIPS_CPU_HTW;
324 341
325 return config3 & MIPS_CONF_M; 342 return config3 & MIPS_CONF_M;
326} 343}
@@ -1193,6 +1210,12 @@ void cpu_probe(void)
1193 if (mips_dsp_disabled) 1210 if (mips_dsp_disabled)
1194 c->ases &= ~(MIPS_ASE_DSP | MIPS_ASE_DSP2P); 1211 c->ases &= ~(MIPS_ASE_DSP | MIPS_ASE_DSP2P);
1195 1212
1213 if (mips_htw_disabled) {
1214 c->options &= ~MIPS_CPU_HTW;
1215 write_c0_pwctl(read_c0_pwctl() &
1216 ~(1 << MIPS_PWCTL_PWEN_SHIFT));
1217 }
1218
1196 if (c->options & MIPS_CPU_FPU) { 1219 if (c->options & MIPS_CPU_FPU) {
1197 c->fpu_id = cpu_get_fpu_id(); 1220 c->fpu_id = cpu_get_fpu_id();
1198 1221