[MIPS] PMC MSP71xx mips common

Patch to add mips common support for the PMC-Sierra MSP71xx devices.

Signed-off-by: Marc St-Jean <Marc_St-Jean@pmc-sierra.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 20 insertions, 0 deletions

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 23d8a3b7dd75..c6b8b074a81a 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -186,9 +186,29 @@ static inline void check_wait(void)
         }
 }
 
+static inline void check_errata(void)
+{
+        struct cpuinfo_mips *c = &current_cpu_data;
+
+        switch (c->cputype) {
+        case CPU_34K:
+                /*
+                 * Erratum "RPS May Cause Incorrect Instruction Execution"
+                 * This code only handles VPE0, any SMP/SMTC/RTOS code
+                 * making use of VPE1 will be responsable for that VPE.
+                 */
+                if ((c->processor_id & PRID_REV_MASK) <= PRID_REV_34K_V1_0_2)
+                        write_c0_config7(read_c0_config7() | MIPS_CONF7_RPS);
+                break;
+        default:
+                break;
+        }
+}
+
 void __init check_bugs32(void)
 {
         check_wait();
+        check_errata();
 }
 
 /*