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authorDavid Daney <ddaney@avtrex.com>2008-09-23 03:07:16 -0400
committerRalf Baechle <ralf@linux-mips.org>2008-10-11 11:18:56 -0400
commit654f57bfb467996fb730eae96dc30ea4de989fdc (patch)
tree20843169f98a37ffe4908486de587a5817653140 /arch/mips/kernel/cpu-probe.c
parent6aa3524c182c01b8b8b7c21c4da20c742a9b4d86 (diff)
MIPS: Probe watch registers and report configuration.
Probe for watch register characteristics, and report them in /proc/cpuinfo. Signed-off-by: David Daney <ddaney@avtrex.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/cpu-probe.c')
-rw-r--r--arch/mips/kernel/cpu-probe.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index e621fda8ab37..0cf15457ecac 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -21,6 +21,7 @@
21#include <asm/fpu.h> 21#include <asm/fpu.h>
22#include <asm/mipsregs.h> 22#include <asm/mipsregs.h>
23#include <asm/system.h> 23#include <asm/system.h>
24#include <asm/watch.h>
24 25
25/* 26/*
26 * Not all of the MIPS CPUs have the "wait" instruction available. Moreover, 27 * Not all of the MIPS CPUs have the "wait" instruction available. Moreover,
@@ -677,6 +678,7 @@ static inline void spram_config(void) {}
677static inline void cpu_probe_mips(struct cpuinfo_mips *c) 678static inline void cpu_probe_mips(struct cpuinfo_mips *c)
678{ 679{
679 decode_configs(c); 680 decode_configs(c);
681 mips_probe_watch_registers(c);
680 switch (c->processor_id & 0xff00) { 682 switch (c->processor_id & 0xff00) {
681 case PRID_IMP_4KC: 683 case PRID_IMP_4KC:
682 c->cputype = CPU_4KC; 684 c->cputype = CPU_4KC;