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authorRalf Baechle <ralf@linux-mips.org>2006-06-02 06:48:11 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-10-09 18:20:45 -0400
commit441ee341ad63572f39cb8074e31806b5b1471d0b (patch)
tree66da0692f385f8b29982847f01c10215333d0e85 /arch/mips/kernel/cpu-probe.c
parent81e859ac1eef300c1b2ff49a2f2da8ee4ce1e844 (diff)
[MIPS] Fix RM9000 wait instruction detection.
Only revisions < 4.0 don't have a functional wait instruction. From Thomas Koeller (Thomas.Koeller@baslerweb.com). Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/cpu-probe.c')
-rw-r--r--arch/mips/kernel/cpu-probe.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 9fbf8430c849..8485af340ee1 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -135,7 +135,6 @@ static inline void check_wait(void)
135 case CPU_R5000: 135 case CPU_R5000:
136 case CPU_NEVADA: 136 case CPU_NEVADA:
137 case CPU_RM7000: 137 case CPU_RM7000:
138 case CPU_RM9000:
139 case CPU_4KC: 138 case CPU_4KC:
140 case CPU_4KEC: 139 case CPU_4KEC:
141 case CPU_4KSC: 140 case CPU_4KSC:
@@ -164,6 +163,14 @@ static inline void check_wait(void)
164 } else 163 } else
165 printk(" unavailable.\n"); 164 printk(" unavailable.\n");
166 break; 165 break;
166 case CPU_RM9000:
167 if ((c->processor_id & 0x00ff) >= 0x40) {
168 cpu_wait = r4k_wait;
169 printk(" available.\n");
170 } else {
171 printk(" unavailable.\n");
172 }
173 break;
167 default: 174 default:
168 printk(" unavailable.\n"); 175 printk(" unavailable.\n");
169 break; 176 break;