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authorRalf Baechle <ralf@linux-mips.org>2007-11-08 13:02:29 -0500
committerRalf Baechle <ralf@linux-mips.org>2007-11-15 18:21:49 -0500
commitf6771dbb27c704ce837ba3bb1dcaa53f48f76ea8 (patch)
treeefec5eacc34a9e412a193a79d575cbf3b90acf23 /arch/mips/kernel/cpu-probe.c
parentefb9ca08b5a2374b29938cdcab417ce4feb14b54 (diff)
[MIPS] Fix shadow register support.
Shadow register support would not possibly have worked on multicore systems. The support code for it was also depending not on MIPS R2 but VSMP or SMTC kernels even though it makes perfect sense with UP kernels. SR sets are a scarce resource and the expected usage pattern is that users actually hardcode the register set numbers in their code. So fix the allocator by ditching it. Move the remaining CPU probe bits into the generic CPU probe. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/cpu-probe.c')
-rw-r--r--arch/mips/kernel/cpu-probe.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index c8c47a2d1972..5c2794391bf5 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -943,6 +943,11 @@ __init void cpu_probe(void)
943 } 943 }
944 944
945 __cpu_name[cpu] = cpu_to_name(c); 945 __cpu_name[cpu] = cpu_to_name(c);
946
947 if (cpu_has_mips_r2)
948 c->srsets = ((read_c0_srsctl() >> 26) & 0x0f) + 1;
949 else
950 c->srsets = 1;
946} 951}
947 952
948__init void cpu_report(void) 953__init void cpu_report(void)