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authorRalf Baechle <ralf@linux-mips.org>2005-05-09 09:16:07 -0400
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 14:31:13 -0400
commit1d74f6bc85cbdc4601e5aea1e67ccbd259f0c7f4 (patch)
treee9ffdef4000ab6e45a5d4c9233da0a7a67daf285 /arch/mips/kernel/branch.c
parentd547c5cc2186be9d74b0c595dc8059aef56cd445 (diff)
__compute_return_epc() uses CFC1 instruction which might result in a
coprocessor unusable exception since the process can lose its fpu context by preemption. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/branch.c')
-rw-r--r--arch/mips/kernel/branch.c10
1 files changed, 7 insertions, 3 deletions
diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
index 01117e977a7f..56aea5f526a7 100644
--- a/arch/mips/kernel/branch.c
+++ b/arch/mips/kernel/branch.c
@@ -12,6 +12,7 @@
12#include <asm/branch.h> 12#include <asm/branch.h>
13#include <asm/cpu.h> 13#include <asm/cpu.h>
14#include <asm/cpu-features.h> 14#include <asm/cpu-features.h>
15#include <asm/fpu.h>
15#include <asm/inst.h> 16#include <asm/inst.h>
16#include <asm/ptrace.h> 17#include <asm/ptrace.h>
17#include <asm/uaccess.h> 18#include <asm/uaccess.h>
@@ -161,10 +162,13 @@ int __compute_return_epc(struct pt_regs *regs)
161 * And now the FPA/cp1 branch instructions. 162 * And now the FPA/cp1 branch instructions.
162 */ 163 */
163 case cop1_op: 164 case cop1_op:
164 if (!cpu_has_fpu) 165 preempt_disable();
165 fcr31 = current->thread.fpu.soft.fcr31; 166 if (is_fpu_owner())
166 else
167 asm volatile("cfc1\t%0,$31" : "=r" (fcr31)); 167 asm volatile("cfc1\t%0,$31" : "=r" (fcr31));
168 else
169 fcr31 = current->thread.fpu.hard.fcr31;
170 preempt_enable();
171
168 bit = (insn.i_format.rt >> 2); 172 bit = (insn.i_format.rt >> 2);
169 bit += (bit != 0); 173 bit += (bit != 0);
170 bit += 23; 174 bit += 23;