diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2006-04-03 12:56:36 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2006-04-18 22:14:21 -0400 |
commit | e4ac58afdfac792c0583af30dbd9eae53e24c78b (patch) | |
tree | 7517bef2c515fc630e4d3d238867b91cde96f558 /arch/mips/ite-boards/generic/irq.c | |
parent | d35d473c25d43d7db3e5e18b66d558d2a631cca8 (diff) |
[MIPS] Rewrite all the assembler interrupt handlers to C.
Saves like 1,600 lines of code, is way easier to debug, compilers
frequently do a better job than the cut and paste type of handlers many
boards had. And finally having all the stuff done in a single place
also means alot of bug potencial for the MT ASE is gone.
The only surviving handler in assembler is the DECstation one; I hope
Maciej will rewrite it.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/ite-boards/generic/irq.c')
-rw-r--r-- | arch/mips/ite-boards/generic/irq.c | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/arch/mips/ite-boards/generic/irq.c b/arch/mips/ite-boards/generic/irq.c index 8c1cdfcd4284..77be7216bdd0 100644 --- a/arch/mips/ite-boards/generic/irq.c +++ b/arch/mips/ite-boards/generic/irq.c | |||
@@ -64,7 +64,6 @@ | |||
64 | 64 | ||
65 | extern void set_debug_traps(void); | 65 | extern void set_debug_traps(void); |
66 | extern void mips_timer_interrupt(int irq, struct pt_regs *regs); | 66 | extern void mips_timer_interrupt(int irq, struct pt_regs *regs); |
67 | extern asmlinkage void it8172_IRQ(void); | ||
68 | 67 | ||
69 | struct it8172_intc_regs volatile *it8172_hw0_icregs = | 68 | struct it8172_intc_regs volatile *it8172_hw0_icregs = |
70 | (struct it8172_intc_regs volatile *)(KSEG1ADDR(IT8172_PCI_IO_BASE + IT_INTC_BASE)); | 69 | (struct it8172_intc_regs volatile *)(KSEG1ADDR(IT8172_PCI_IO_BASE + IT_INTC_BASE)); |
@@ -178,8 +177,6 @@ void __init arch_init_irq(void) | |||
178 | int i; | 177 | int i; |
179 | unsigned long flags; | 178 | unsigned long flags; |
180 | 179 | ||
181 | set_except_vector(0, it8172_IRQ); | ||
182 | |||
183 | /* mask all interrupts */ | 180 | /* mask all interrupts */ |
184 | it8172_hw0_icregs->lb_mask = 0xffff; | 181 | it8172_hw0_icregs->lb_mask = 0xffff; |
185 | it8172_hw0_icregs->lpc_mask = 0xffff; | 182 | it8172_hw0_icregs->lpc_mask = 0xffff; |
@@ -279,6 +276,18 @@ void it8172_hw0_irqdispatch(struct pt_regs *regs) | |||
279 | do_IRQ(irq, regs); | 276 | do_IRQ(irq, regs); |
280 | } | 277 | } |
281 | 278 | ||
279 | asmlinkage void plat_irq_dispatch(struct pt_regs *regs) | ||
280 | { | ||
281 | unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM; | ||
282 | |||
283 | if (!pending) | ||
284 | mips_spurious_interrupt(regs); | ||
285 | else if (pending & CAUSEF_IP7) | ||
286 | ll_timer_interrupt(127, regs); | ||
287 | else if (pending & CAUSEF_IP2) | ||
288 | it8172_hw0_irqdispatch(regs); | ||
289 | } | ||
290 | |||
282 | void show_pending_irqs(void) | 291 | void show_pending_irqs(void) |
283 | { | 292 | { |
284 | fputs("intstatus: "); | 293 | fputs("intstatus: "); |