MIPS: Emulate the new MIPS R6 BNEZC and JIALC instructions

MIPS R6 uses the <R6 sdc2 opcode for the new BNEZC and JIALC instructions

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h
index 721f8fe705a4..fc0cf5ac0cf7 100644
--- a/arch/mips/include/uapi/asm/inst.h
+++ b/arch/mips/include/uapi/asm/inst.h
@@ -34,7 +34,7 @@ enum major_op {
         ll_op, lwc1_op, lwc2_op, bc6_op = lwc2_op, pref_op,
         lld_op, ldc1_op, ldc2_op, beqzcjic_op = ldc2_op, ld_op,
         sc_op, swc1_op, swc2_op, balc6_op = swc2_op, major_3b_op,
-        scd_op, sdc1_op, sdc2_op, sd_op
+        scd_op, sdc1_op, sdc2_op, bnezcjialc_op = sdc2_op, sd_op
 };
 
 /*