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authorDavid Daney <ddaney@caviumnetworks.com>2009-08-20 17:10:22 -0400
committerRalf Baechle <ralf@linux-mips.org>2009-09-17 14:07:51 -0400
commite26449153c386904d2801d6348d66d00e5ba2211 (patch)
treede1ef89387558c11c4451e2ad9c6c24e9fddeaf8 /arch/mips/include
parent982f6ffeeed5ef6104cfd72e517ff9e7a9270fda (diff)
MIPS: Octeon: Add hardware RNG platform device.
Add a platform device for the Octeon Random Number Generator (RNG). Signed-off-by: David Daney <ddaney@caviumnetworks.com> Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include')
-rw-r--r--arch/mips/include/asm/octeon/cvmx-rnm-defs.h88
1 files changed, 88 insertions, 0 deletions
diff --git a/arch/mips/include/asm/octeon/cvmx-rnm-defs.h b/arch/mips/include/asm/octeon/cvmx-rnm-defs.h
new file mode 100644
index 000000000000..4586958c97be
--- /dev/null
+++ b/arch/mips/include/asm/octeon/cvmx-rnm-defs.h
@@ -0,0 +1,88 @@
1/***********************license start***************
2 * Author: Cavium Networks
3 *
4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK
6 *
7 * Copyright (c) 2003-2008 Cavium Networks
8 *
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
17 * details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this file; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * or visit http://www.gnu.org/licenses/.
23 *
24 * This file may also be available under a different license from Cavium.
25 * Contact Cavium Networks for more information
26 ***********************license end**************************************/
27
28#ifndef __CVMX_RNM_DEFS_H__
29#define __CVMX_RNM_DEFS_H__
30
31#include <linux/types.h>
32
33#define CVMX_RNM_BIST_STATUS \
34 CVMX_ADD_IO_SEG(0x0001180040000008ull)
35#define CVMX_RNM_CTL_STATUS \
36 CVMX_ADD_IO_SEG(0x0001180040000000ull)
37
38union cvmx_rnm_bist_status {
39 uint64_t u64;
40 struct cvmx_rnm_bist_status_s {
41 uint64_t reserved_2_63:62;
42 uint64_t rrc:1;
43 uint64_t mem:1;
44 } s;
45 struct cvmx_rnm_bist_status_s cn30xx;
46 struct cvmx_rnm_bist_status_s cn31xx;
47 struct cvmx_rnm_bist_status_s cn38xx;
48 struct cvmx_rnm_bist_status_s cn38xxp2;
49 struct cvmx_rnm_bist_status_s cn50xx;
50 struct cvmx_rnm_bist_status_s cn52xx;
51 struct cvmx_rnm_bist_status_s cn52xxp1;
52 struct cvmx_rnm_bist_status_s cn56xx;
53 struct cvmx_rnm_bist_status_s cn56xxp1;
54 struct cvmx_rnm_bist_status_s cn58xx;
55 struct cvmx_rnm_bist_status_s cn58xxp1;
56};
57
58union cvmx_rnm_ctl_status {
59 uint64_t u64;
60 struct cvmx_rnm_ctl_status_s {
61 uint64_t reserved_9_63:55;
62 uint64_t ent_sel:4;
63 uint64_t exp_ent:1;
64 uint64_t rng_rst:1;
65 uint64_t rnm_rst:1;
66 uint64_t rng_en:1;
67 uint64_t ent_en:1;
68 } s;
69 struct cvmx_rnm_ctl_status_cn30xx {
70 uint64_t reserved_4_63:60;
71 uint64_t rng_rst:1;
72 uint64_t rnm_rst:1;
73 uint64_t rng_en:1;
74 uint64_t ent_en:1;
75 } cn30xx;
76 struct cvmx_rnm_ctl_status_cn30xx cn31xx;
77 struct cvmx_rnm_ctl_status_cn30xx cn38xx;
78 struct cvmx_rnm_ctl_status_cn30xx cn38xxp2;
79 struct cvmx_rnm_ctl_status_s cn50xx;
80 struct cvmx_rnm_ctl_status_s cn52xx;
81 struct cvmx_rnm_ctl_status_s cn52xxp1;
82 struct cvmx_rnm_ctl_status_s cn56xx;
83 struct cvmx_rnm_ctl_status_s cn56xxp1;
84 struct cvmx_rnm_ctl_status_s cn58xx;
85 struct cvmx_rnm_ctl_status_s cn58xxp1;
86};
87
88#endif