Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus

Pull MIPS updates from Ralf Baechle:
 - three fixes for 3.15 that didn't make it in time
 - limited Octeon 3 support.
 - paravirtualization support
 - improvment to platform support for Netlogix SOCs.
 - add support for powering down the Malta eval board in software
 - add many instructions to the in-kernel microassembler.
 - add support for the BPF JIT.
 - minor cleanups of the BCM47xx code.
 - large cleanup of math emu code resulting in significant code size
   reduction, better readability of the code and more accurate
   emulation.
 - improvments to the MIPS CPS code.
 - support C3 power status for the R4k count/compare clock device.
 - improvments to the GIO support for older SGI workstations.
 - increase number of supported CPUs to 256; this can be reached on
   certain embedded multithreaded ccNUMA configurations.
 - various small cleanups, updates and fixes

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (173 commits)
  MIPS: IP22/IP28: Improve GIO support
  MIPS: Octeon: Add twsi interrupt initialization for OCTEON 3XXX, 5XXX, 63XX
  DEC: Document the R4k MB ASIC mini interrupt controller
  DEC: Add self as the maintainer
  MIPS: Add microMIPS MSA support.
  MIPS: Replace calls to obsolete strict_strto call with kstrto* equivalents.
  MIPS: Replace obsolete strict_strto call with kstrto
  MIPS: BFP: Simplify code slightly.
  MIPS: Call find_vma with the mmap_sem held
  MIPS: Fix 'write_msa_##' inline macro.
  MIPS: Fix MSA toolchain support detection.
  mips: Update the email address of Geert Uytterhoeven
  MIPS: Add minimal defconfig for mips_paravirt
  MIPS: Enable build for new system 'paravirt'
  MIPS: paravirt: Add pci controller for virtio
  MIPS: Add code for new system 'paravirt'
  MIPS: Add functions for hypervisor call
  MIPS: OCTEON: Add OCTEON3 to __get_cpu_type
  MIPS: Add function get_ebase_cpunum
  MIPS: Add minimal support for OCTEON3 to c-r4k.c
  ...

5 files changed, 74 insertions, 31 deletions

diff --git a/arch/mips/include/uapi/asm/Kbuild b/arch/mips/include/uapi/asm/Kbuild
index be7196eacb88..96fe7395ed8d 100644
--- a/arch/mips/include/uapi/asm/Kbuild
+++ b/arch/mips/include/uapi/asm/Kbuild
@@ -4,6 +4,7 @@ include include/uapi/asm-generic/Kbuild.asm
 generic-y += auxvec.h
 generic-y += ipcbuf.h
 
+header-y += bitfield.h
 header-y += bitsperlong.h
 header-y += break.h
 header-y += byteorder.h
diff --git a/arch/mips/include/uapi/asm/bitfield.h b/arch/mips/include/uapi/asm/bitfield.h
new file mode 100644
index 000000000000..ad9861359cea
--- /dev/null
+++ b/arch/mips/include/uapi/asm/bitfield.h
@@ -0,0 +1,29 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2014 by Ralf Baechle <ralf@linux-mips.org>
+ */
+#ifndef __UAPI_ASM_BITFIELD_H
+#define __UAPI_ASM_BITFIELD_H
+
+/*
+ *  * Damn ...  bitfields depend from byteorder :-(
+ *   */
+#ifdef __MIPSEB__
+#define __BITFIELD_FIELD(field, more)                                   \
+        field;                                                          \
+        more
+
+#elif defined(__MIPSEL__)
+
+#define __BITFIELD_FIELD(field, more)                                   \
+        more                                                            \
+        field;
+
+#else /* !defined (__MIPSEB__) && !defined (__MIPSEL__) */
+#error "MIPS but neither __MIPSEL__ nor __MIPSEB__?"
+#endif
+
+#endif /* __UAPI_ASM_BITFIELD_H */
diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h
index 3125797f2a88..4b7160259292 100644
--- a/arch/mips/include/uapi/asm/inst.h
+++ b/arch/mips/include/uapi/asm/inst.h
@@ -13,6 +13,8 @@
 #ifndef _UAPI_ASM_INST_H
 #define _UAPI_ASM_INST_H
 
+#include <asm/bitfield.h>
+
 /*
  * Major opcodes; before MIPS IV cop1x was called cop3.
  */
@@ -74,16 +76,17 @@ enum spec2_op {
 enum spec3_op {
         ext_op, dextm_op, dextu_op, dext_op,
         ins_op, dinsm_op, dinsu_op, dins_op,
-        lx_op     = 0x0a, lwle_op   = 0x19,
-        lwre_op   = 0x1a, cachee_op = 0x1b,
-        sbe_op    = 0x1c, she_op    = 0x1d,
-        sce_op    = 0x1e, swe_op    = 0x1f,
-        bshfl_op  = 0x20, swle_op   = 0x21,
-        swre_op   = 0x22, prefe_op  = 0x23,
-        dbshfl_op = 0x24, lbue_op   = 0x28,
-        lhue_op   = 0x29, lbe_op    = 0x2c,
-        lhe_op    = 0x2d, lle_op    = 0x2e,
-        lwe_op    = 0x2f, rdhwr_op  = 0x3b
+        yield_op  = 0x09, lx_op     = 0x0a,
+        lwle_op   = 0x19, lwre_op   = 0x1a,
+        cachee_op = 0x1b, sbe_op    = 0x1c,
+        she_op    = 0x1d, sce_op    = 0x1e,
+        swe_op    = 0x1f, bshfl_op  = 0x20,
+        swle_op   = 0x21, swre_op   = 0x22,
+        prefe_op  = 0x23, dbshfl_op = 0x24,
+        lbue_op   = 0x28, lhue_op   = 0x29,
+        lbe_op    = 0x2c, lhe_op    = 0x2d,
+        lle_op    = 0x2e, lwe_op    = 0x2f,
+        rdhwr_op  = 0x3b
 };
 
 /*
@@ -125,7 +128,8 @@ enum bcop_op {
 enum cop0_coi_func {
         tlbr_op       = 0x01, tlbwi_op      = 0x02,
         tlbwr_op      = 0x06, tlbp_op       = 0x08,
-        rfe_op        = 0x10, eret_op       = 0x18
+        rfe_op        = 0x10, eret_op       = 0x18,
+        wait_op       = 0x20,
 };
 
 /*
@@ -202,6 +206,16 @@ enum lx_func {
 };
 
 /*
+ * BSHFL opcodes
+ */
+enum bshfl_func {
+        wsbh_op = 0x2,
+        dshd_op = 0x5,
+        seb_op  = 0x10,
+        seh_op  = 0x18,
+};
+
+/*
  * (microMIPS) Major opcodes.
  */
 enum mm_major_op {
@@ -244,17 +258,22 @@ enum mm_32i_minor_op {
 enum mm_32a_minor_op {
         mm_sll32_op = 0x000,
         mm_ins_op = 0x00c,
+        mm_sllv32_op = 0x010,
         mm_ext_op = 0x02c,
         mm_pool32axf_op = 0x03c,
         mm_srl32_op = 0x040,
         mm_sra_op = 0x080,
+        mm_srlv32_op = 0x090,
         mm_rotr_op = 0x0c0,
         mm_lwxs_op = 0x118,
         mm_addu32_op = 0x150,
         mm_subu32_op = 0x1d0,
+        mm_wsbh_op = 0x1ec,
+        mm_mul_op = 0x210,
         mm_and_op = 0x250,
         mm_or32_op = 0x290,
         mm_xor32_op = 0x310,
+        mm_sltu_op = 0x390,
 };
 
 /*
@@ -294,15 +313,20 @@ enum mm_32axf_minor_op {
         mm_mfc0_op = 0x003,
         mm_mtc0_op = 0x00b,
         mm_tlbp_op = 0x00d,
+        mm_mfhi32_op = 0x035,
         mm_jalr_op = 0x03c,
         mm_tlbr_op = 0x04d,
+        mm_mflo32_op = 0x075,
         mm_jalrhb_op = 0x07c,
         mm_tlbwi_op = 0x08d,
         mm_tlbwr_op = 0x0cd,
         mm_jalrs_op = 0x13c,
         mm_jalrshb_op = 0x17c,
+        mm_sync_op = 0x1ad,
         mm_syscall_op = 0x22d,
+        mm_wait_op = 0x24d,
         mm_eret_op = 0x3cd,
+        mm_divu_op = 0x5dc,
 };
 
 /*
@@ -480,24 +504,6 @@ enum MIPS6e_i8_func {
  */
 #define MM_NOP16        0x0c00
 
-/*
- * Damn ...  bitfields depend from byteorder :-(
- */
-#ifdef __MIPSEB__
-#define __BITFIELD_FIELD(field, more)                                   \
-        field;                                                          \
-        more
-
-#elif defined(__MIPSEL__)
-
-#define __BITFIELD_FIELD(field, more)                                   \
-        more                                                            \
-        field;
-
-#else /* !defined (__MIPSEB__) && !defined (__MIPSEL__) */
-#error "MIPS but neither __MIPSEL__ nor __MIPSEB__?"
-#endif
-
 struct j_format {
         __BITFIELD_FIELD(unsigned int opcode : 6, /* Jump format */
         __BITFIELD_FIELD(unsigned int target : 26,
diff --git a/arch/mips/include/uapi/asm/kvm_para.h b/arch/mips/include/uapi/asm/kvm_para.h
index 14fab8f0b957..7e16d7c42e65 100644
--- a/arch/mips/include/uapi/asm/kvm_para.h
+++ b/arch/mips/include/uapi/asm/kvm_para.h
@@ -1 +1,5 @@
-#include <asm-generic/kvm_para.h>
+#ifndef _UAPI_ASM_MIPS_KVM_PARA_H
+#define _UAPI_ASM_MIPS_KVM_PARA_H
+
+
+#endif /* _UAPI_ASM_MIPS_KVM_PARA_H */
diff --git a/arch/mips/include/uapi/asm/types.h b/arch/mips/include/uapi/asm/types.h
index 7ac9d0baad84..f3dd9ff0cc0c 100644
--- a/arch/mips/include/uapi/asm/types.h
+++ b/arch/mips/include/uapi/asm/types.h
@@ -14,9 +14,12 @@
 /*
  * We don't use int-l64.h for the kernel anymore but still use it for
  * userspace to avoid code changes.
+ *
+ * However, some user programs (e.g. perf) may not want this. They can
+ * flag __SANE_USERSPACE_TYPES__ to get int-ll64.h here.
  */
 #ifndef __KERNEL__
-# if _MIPS_SZLONG == 64
+# if _MIPS_SZLONG == 64 && !defined(__SANE_USERSPACE_TYPES__)
 #  include <asm-generic/int-l64.h>
 # else
 #  include <asm-generic/int-ll64.h>