MIPS: Decouple BMIPS CPU support from bcm47xx/bcm63xx SoC code

BMIPS processor cores are used in 50+ different chipsets spread across
5+ product lines.  In many cases the chipsets do not share the same
peripheral register layouts, the same register blocks, the same
interrupt controllers, the same memory maps, or much of anything else.

But, across radically different SoCs that share nothing more than the
same BMIPS CPU, a few things are still mostly constant:

SMP operations
Access to performance counters
DMA cache coherency quirks
Cache and memory bus configuration

So, it makes sense to treat each BMIPS processor type as a generic
"building block," rather than tying it to a specific SoC.  This makes it
easier to support a large number of BMIPS-based chipsets without
unnecessary duplication of code, and provides the infrastructure needed
to support BMIPS-proprietary features.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: mbizon@freebox.fr
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Tested-by: Florian Fainelli <ffainelli@freebox.fr>
Patchwork: https://patchwork.linux-mips.org/patch/1706/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org

1 files changed, 12 insertions, 11 deletions

diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index 049a189ea91f..06d59dcbe243 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -111,14 +111,16 @@
  * These are the PRID's for when 23:16 == PRID_COMP_BROADCOM
  */
 
-#define PRID_IMP_BCM4710        0x4000
-#define PRID_IMP_BCM3302        0x9000
-#define PRID_IMP_BCM6338        0x9000
-#define PRID_IMP_BCM6345        0x8000
-#define PRID_IMP_BCM6348        0x9100
-#define PRID_IMP_BCM4350        0xA000
-#define PRID_REV_BCM6358        0x0010
-#define PRID_REV_BCM6368        0x0030
+#define PRID_IMP_BMIPS4KC       0x4000
+#define PRID_IMP_BMIPS32        0x8000
+#define PRID_IMP_BMIPS3300      0x9000
+#define PRID_IMP_BMIPS3300_ALT  0x9100
+#define PRID_IMP_BMIPS3300_BUG  0x0000
+#define PRID_IMP_BMIPS43XX      0xa000
+#define PRID_IMP_BMIPS5000      0x5a00
+
+#define PRID_REV_BMIPS4380_LO   0x0040
+#define PRID_REV_BMIPS4380_HI   0x006f
 
 /*
  * These are the PRID's for when 23:16 == PRID_COMP_CAVIUM
@@ -224,9 +226,8 @@ enum cpu_type_enum {
          * MIPS32 class processors
          */
         CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K,
-        CPU_ALCHEMY, CPU_PR4450, CPU_BCM3302, CPU_BCM4710,
-        CPU_BCM6338, CPU_BCM6345, CPU_BCM6348, CPU_BCM6358,
-        CPU_JZRISC,
+        CPU_ALCHEMY, CPU_PR4450, CPU_BMIPS32, CPU_BMIPS3300, CPU_BMIPS4350,
+        CPU_BMIPS4380, CPU_BMIPS5000, CPU_JZRISC,
 
         /*
          * MIPS64 class processors