diff options
author | Maciej W. Rozycki <macro@linux-mips.org> | 2015-04-03 18:25:00 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2015-04-07 19:09:12 -0400 |
commit | cb5d4aad6844cdbe2f3b9f5d581ae1c9ec342009 (patch) | |
tree | 2a20f707e1c7711f773e05746e5d8342bc576137 /arch/mips/include/asm | |
parent | 2cfcf8a8313bd9bdb54d62ca4ea581f130869aca (diff) |
MIPS: bitops.h: Avoid inline asm for constant FLS
GCC is smart enough to substitute the final result for FLS calculations
as implemented in the fallback C code we have in `__fls' and `fls'
applied to constant values. The presence of inline asm defeats the
compiler though, forcing it to emit extraneous CLZ/DCLZ calculation for
processors that support these instructions.
Use `__builtin_constant_p' then to avoid inline asm altogether for
constants.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9681/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm')
-rw-r--r-- | arch/mips/include/asm/bitops.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h index 9f935f6aa996..0cf29bd5dc5c 100644 --- a/arch/mips/include/asm/bitops.h +++ b/arch/mips/include/asm/bitops.h | |||
@@ -481,7 +481,7 @@ static inline unsigned long __fls(unsigned long word) | |||
481 | { | 481 | { |
482 | int num; | 482 | int num; |
483 | 483 | ||
484 | if (BITS_PER_LONG == 32 && | 484 | if (BITS_PER_LONG == 32 && !__builtin_constant_p(word) && |
485 | __builtin_constant_p(cpu_has_clo_clz) && cpu_has_clo_clz) { | 485 | __builtin_constant_p(cpu_has_clo_clz) && cpu_has_clo_clz) { |
486 | __asm__( | 486 | __asm__( |
487 | " .set push \n" | 487 | " .set push \n" |
@@ -494,7 +494,7 @@ static inline unsigned long __fls(unsigned long word) | |||
494 | return 31 - num; | 494 | return 31 - num; |
495 | } | 495 | } |
496 | 496 | ||
497 | if (BITS_PER_LONG == 64 && | 497 | if (BITS_PER_LONG == 64 && !__builtin_constant_p(word) && |
498 | __builtin_constant_p(cpu_has_mips64) && cpu_has_mips64) { | 498 | __builtin_constant_p(cpu_has_mips64) && cpu_has_mips64) { |
499 | __asm__( | 499 | __asm__( |
500 | " .set push \n" | 500 | " .set push \n" |
@@ -559,7 +559,8 @@ static inline int fls(int x) | |||
559 | { | 559 | { |
560 | int r; | 560 | int r; |
561 | 561 | ||
562 | if (__builtin_constant_p(cpu_has_clo_clz) && cpu_has_clo_clz) { | 562 | if (!__builtin_constant_p(x) && |
563 | __builtin_constant_p(cpu_has_clo_clz) && cpu_has_clo_clz) { | ||
563 | __asm__( | 564 | __asm__( |
564 | " .set push \n" | 565 | " .set push \n" |
565 | " .set "MIPS_ISA_LEVEL" \n" | 566 | " .set "MIPS_ISA_LEVEL" \n" |