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authorRalf Baechle <ralf@linux-mips.org>2015-05-22 19:20:19 -0400
committerRalf Baechle <ralf@linux-mips.org>2015-06-10 05:24:53 -0400
commit9cc719ab3f4f639d629ac8ff09e9b998bc006f68 (patch)
treede4114198eb5dc0c3a55275931aceaf99a448e69 /arch/mips/include/asm
parentd9fb5660459819513d510e72caa3120a7cf41ee1 (diff)
MIPS: MSA: bugfix - disable MSA correctly for new threads/processes.
Due to the slightly odd way that new threads and processes start execution when scheduled for the very first time they were bypassing the required disable_msa call. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm')
-rw-r--r--arch/mips/include/asm/switch_to.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/asm/switch_to.h b/arch/mips/include/asm/switch_to.h
index e92d6c4b5ed1..7163cd7fdd69 100644
--- a/arch/mips/include/asm/switch_to.h
+++ b/arch/mips/include/asm/switch_to.h
@@ -104,7 +104,6 @@ do { \
104 if (test_and_clear_tsk_thread_flag(prev, TIF_USEDMSA)) \ 104 if (test_and_clear_tsk_thread_flag(prev, TIF_USEDMSA)) \
105 __fpsave = FP_SAVE_VECTOR; \ 105 __fpsave = FP_SAVE_VECTOR; \
106 (last) = resume(prev, next, task_thread_info(next), __fpsave); \ 106 (last) = resume(prev, next, task_thread_info(next), __fpsave); \
107 disable_msa(); \
108} while (0) 107} while (0)
109 108
110#define finish_arch_switch(prev) \ 109#define finish_arch_switch(prev) \
@@ -122,6 +121,7 @@ do { \
122 if (cpu_has_userlocal) \ 121 if (cpu_has_userlocal) \
123 write_c0_userlocal(current_thread_info()->tp_value); \ 122 write_c0_userlocal(current_thread_info()->tp_value); \
124 __restore_watch(); \ 123 __restore_watch(); \
124 disable_msa(); \
125} while (0) 125} while (0)
126 126
127#endif /* _ASM_SWITCH_TO_H */ 127#endif /* _ASM_SWITCH_TO_H */