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authorRalf Baechle <ralf@linux-mips.org>2008-09-16 13:48:51 -0400
committerRalf Baechle <ralf@linux-mips.org>2008-10-11 11:18:52 -0400
commit384740dc49ea651ba350704d13ff6be9976e37fe (patch)
treea6e80cad287ccae7a86d81bfa692fc96889c88ed /arch/mips/include/asm/tlb.h
parente8c7c482347574ecdd45c43e32c332d5fc2ece61 (diff)
MIPS: Move headfiles to new location below arch/mips/include
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/tlb.h')
-rw-r--r--arch/mips/include/asm/tlb.h23
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/mips/include/asm/tlb.h b/arch/mips/include/asm/tlb.h
new file mode 100644
index 000000000000..80d9dfcf1e88
--- /dev/null
+++ b/arch/mips/include/asm/tlb.h
@@ -0,0 +1,23 @@
1#ifndef __ASM_TLB_H
2#define __ASM_TLB_H
3
4/*
5 * MIPS doesn't need any special per-pte or per-vma handling, except
6 * we need to flush cache for area to be unmapped.
7 */
8#define tlb_start_vma(tlb, vma) \
9 do { \
10 if (!tlb->fullmm) \
11 flush_cache_range(vma, vma->vm_start, vma->vm_end); \
12 } while (0)
13#define tlb_end_vma(tlb, vma) do { } while (0)
14#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
15
16/*
17 * .. because we flush the whole mm when it fills up.
18 */
19#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
20
21#include <asm-generic/tlb.h>
22
23#endif /* __ASM_TLB_H */