diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2008-09-16 13:48:51 -0400 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2008-10-11 11:18:52 -0400 |
commit | 384740dc49ea651ba350704d13ff6be9976e37fe (patch) | |
tree | a6e80cad287ccae7a86d81bfa692fc96889c88ed /arch/mips/include/asm/mach-rc32434/irq.h | |
parent | e8c7c482347574ecdd45c43e32c332d5fc2ece61 (diff) |
MIPS: Move headfiles to new location below arch/mips/include
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mach-rc32434/irq.h')
-rw-r--r-- | arch/mips/include/asm/mach-rc32434/irq.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-rc32434/irq.h b/arch/mips/include/asm/mach-rc32434/irq.h new file mode 100644 index 000000000000..56738d8ec4e2 --- /dev/null +++ b/arch/mips/include/asm/mach-rc32434/irq.h | |||
@@ -0,0 +1,33 @@ | |||
1 | #ifndef __ASM_RC32434_IRQ_H | ||
2 | #define __ASM_RC32434_IRQ_H | ||
3 | |||
4 | #define NR_IRQS 256 | ||
5 | |||
6 | #include <asm/mach-generic/irq.h> | ||
7 | #include <asm/mach-rc32434/rb.h> | ||
8 | |||
9 | /* Interrupt Controller */ | ||
10 | #define IC_GROUP0_PEND (REGBASE + 0x38000) | ||
11 | #define IC_GROUP0_MASK (REGBASE + 0x38008) | ||
12 | #define IC_GROUP_OFFSET 0x0C | ||
13 | |||
14 | #define NUM_INTR_GROUPS 5 | ||
15 | |||
16 | /* 16550 UARTs */ | ||
17 | #define GROUP0_IRQ_BASE 8 /* GRP2 IRQ numbers start here */ | ||
18 | /* GRP3 IRQ numbers start here */ | ||
19 | #define GROUP1_IRQ_BASE (GROUP0_IRQ_BASE + 32) | ||
20 | /* GRP4 IRQ numbers start here */ | ||
21 | #define GROUP2_IRQ_BASE (GROUP1_IRQ_BASE + 32) | ||
22 | /* GRP5 IRQ numbers start here */ | ||
23 | #define GROUP3_IRQ_BASE (GROUP2_IRQ_BASE + 32) | ||
24 | #define GROUP4_IRQ_BASE (GROUP3_IRQ_BASE + 32) | ||
25 | |||
26 | #define UART0_IRQ (GROUP3_IRQ_BASE + 0) | ||
27 | |||
28 | #define ETH0_DMA_RX_IRQ (GROUP1_IRQ_BASE + 0) | ||
29 | #define ETH0_DMA_TX_IRQ (GROUP1_IRQ_BASE + 1) | ||
30 | #define ETH0_RX_OVR_IRQ (GROUP3_IRQ_BASE + 9) | ||
31 | #define ETH0_TX_UND_IRQ (GROUP3_IRQ_BASE + 10) | ||
32 | |||
33 | #endif /* __ASM_RC32434_IRQ_H */ | ||