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authorWu Zhangjin <wuzhangjin@gmail.com>2009-07-02 11:26:08 -0400
committerRalf Baechle <ralf@linux-mips.org>2009-09-17 14:07:47 -0400
commit8e4971175acc910eb4258df82a6bd8f2c4e4e5b5 (patch)
tree921d53308d0a8a8e9119ec6b262a01fe0ccd1fd5 /arch/mips/include/asm/mach-loongson
parent67b35e5d01aba7a83f2161b0c90acb08afa01e3e (diff)
MIPS: Loongson: Change naming methods
To make source code of loongson sharable to the machines(such as gdium) made by the other companies, we rename arch/mips/lemote to arch/mips/loongson, asm/mach-lemote to asm/mach-loongson, and rename lm2e to the name of the machine: fuloong-2e. accordingly, FULONG are renamed to FULOONG2E to make it distinguishable to the future FULOONG2F. and also, some other relative tuning is needed. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mach-loongson')
-rw-r--r--arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h59
-rw-r--r--arch/mips/include/asm/mach-loongson/dma-coherence.h68
-rw-r--r--arch/mips/include/asm/mach-loongson/loongson.h53
-rw-r--r--arch/mips/include/asm/mach-loongson/mc146818rtc.h36
-rw-r--r--arch/mips/include/asm/mach-loongson/pci.h31
-rw-r--r--arch/mips/include/asm/mach-loongson/war.h25
6 files changed, 272 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h
new file mode 100644
index 000000000000..ce5b6e270e3f
--- /dev/null
+++ b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h
@@ -0,0 +1,59 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2009 Wu Zhangjin <wuzj@lemote.com>
7 * Copyright (C) 2009 Philippe Vachon <philippe@cowpig.ca>
8 * Copyright (C) 2009 Zhang Le <r0bertz@gentoo.org>
9 *
10 * reference: /proc/cpuinfo,
11 * arch/mips/kernel/cpu-probe.c(cpu_probe_legacy),
12 * arch/mips/kernel/proc.c(show_cpuinfo),
13 * loongson2f user manual.
14 */
15
16#ifndef __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H
17#define __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H
18
19#define cpu_dcache_line_size() 32
20#define cpu_icache_line_size() 32
21#define cpu_scache_line_size() 32
22
23
24#define cpu_has_32fpr 1
25#define cpu_has_3k_cache 0
26#define cpu_has_4k_cache 1
27#define cpu_has_4kex 1
28#define cpu_has_64bits 1
29#define cpu_has_cache_cdex_p 0
30#define cpu_has_cache_cdex_s 0
31#define cpu_has_counter 1
32#define cpu_has_dc_aliases 1
33#define cpu_has_divec 0
34#define cpu_has_dsp 0
35#define cpu_has_ejtag 0
36#define cpu_has_fpu 1
37#define cpu_has_ic_fills_f_dc 0
38#define cpu_has_inclusive_pcaches 1
39#define cpu_has_llsc 1
40#define cpu_has_mcheck 0
41#define cpu_has_mdmx 0
42#define cpu_has_mips16 0
43#define cpu_has_mips32r1 0
44#define cpu_has_mips32r2 0
45#define cpu_has_mips3d 0
46#define cpu_has_mips64r1 0
47#define cpu_has_mips64r2 0
48#define cpu_has_mipsmt 0
49#define cpu_has_prefetch 0
50#define cpu_has_smartmips 0
51#define cpu_has_tlb 1
52#define cpu_has_tx39_cache 0
53#define cpu_has_userlocal 0
54#define cpu_has_vce 0
55#define cpu_has_vtag_icache 0
56#define cpu_has_watch 1
57#define cpu_icache_snoops_remote_store 1
58
59#endif /* __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H */
diff --git a/arch/mips/include/asm/mach-loongson/dma-coherence.h b/arch/mips/include/asm/mach-loongson/dma-coherence.h
new file mode 100644
index 000000000000..71a6851ba833
--- /dev/null
+++ b/arch/mips/include/asm/mach-loongson/dma-coherence.h
@@ -0,0 +1,68 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2006, 07 Ralf Baechle <ralf@linux-mips.org>
7 * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
8 * Author: Fuxin Zhang, zhangfx@lemote.com
9 *
10 */
11#ifndef __ASM_MACH_LOONGSON_DMA_COHERENCE_H
12#define __ASM_MACH_LOONGSON_DMA_COHERENCE_H
13
14struct device;
15
16static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr,
17 size_t size)
18{
19 return virt_to_phys(addr) | 0x80000000;
20}
21
22static inline dma_addr_t plat_map_dma_mem_page(struct device *dev,
23 struct page *page)
24{
25 return page_to_phys(page) | 0x80000000;
26}
27
28static inline unsigned long plat_dma_addr_to_phys(struct device *dev,
29 dma_addr_t dma_addr)
30{
31 return dma_addr & 0x7fffffff;
32}
33
34static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr,
35 size_t size, enum dma_data_direction direction)
36{
37}
38
39static inline int plat_dma_supported(struct device *dev, u64 mask)
40{
41 /*
42 * we fall back to GFP_DMA when the mask isn't all 1s,
43 * so we can't guarantee allocations that must be
44 * within a tighter range than GFP_DMA..
45 */
46 if (mask < DMA_BIT_MASK(24))
47 return 0;
48
49 return 1;
50}
51
52static inline void plat_extra_sync_for_device(struct device *dev)
53{
54 return;
55}
56
57static inline int plat_dma_mapping_error(struct device *dev,
58 dma_addr_t dma_addr)
59{
60 return 0;
61}
62
63static inline int plat_device_is_coherent(struct device *dev)
64{
65 return 0;
66}
67
68#endif /* __ASM_MACH_LOONGSON_DMA_COHERENCE_H */
diff --git a/arch/mips/include/asm/mach-loongson/loongson.h b/arch/mips/include/asm/mach-loongson/loongson.h
new file mode 100644
index 000000000000..e9f74dee24ef
--- /dev/null
+++ b/arch/mips/include/asm/mach-loongson/loongson.h
@@ -0,0 +1,53 @@
1/*
2 * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
3 * Author: Wu Zhangjin <wuzj@lemote.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 */
11
12#ifndef __ASM_MACH_LOONGSON_LOONGSON_H
13#define __ASM_MACH_LOONGSON_LOONGSON_H
14
15#include <linux/io.h>
16#include <linux/init.h>
17
18/* there is an internal bonito64-compatiable northbridge in loongson2e/2f */
19#include <asm/mips-boards/bonito64.h>
20
21/* loongson internal northbridge initialization */
22extern void bonito_irq_init(void);
23
24/* environment arguments from bootloader */
25extern unsigned long bus_clock, cpu_clock_freq;
26extern unsigned long memsize, highmemsize;
27
28/* loongson-specific command line, env and memory initialization */
29extern void __init prom_init_memory(void);
30extern void __init prom_init_cmdline(void);
31extern void __init prom_init_env(void);
32
33/* PCI Configuration Registers */
34#define LOONGSON_PCI_ISR4C BONITO_PCI_REG(0x4c)
35
36/* PCI_Hit*_Sel_* */
37
38#define LOONGSON_PCI_HIT0_SEL_L BONITO(BONITO_REGBASE + 0x50)
39#define LOONGSON_PCI_HIT0_SEL_H BONITO(BONITO_REGBASE + 0x54)
40#define LOONGSON_PCI_HIT1_SEL_L BONITO(BONITO_REGBASE + 0x58)
41#define LOONGSON_PCI_HIT1_SEL_H BONITO(BONITO_REGBASE + 0x5c)
42#define LOONGSON_PCI_HIT2_SEL_L BONITO(BONITO_REGBASE + 0x60)
43#define LOONGSON_PCI_HIT2_SEL_H BONITO(BONITO_REGBASE + 0x64)
44
45/* PXArb Config & Status */
46
47#define LOONGSON_PXARB_CFG BONITO(BONITO_REGBASE + 0x68)
48#define LOONGSON_PXARB_STATUS BONITO(BONITO_REGBASE + 0x6c)
49
50/* loongson2-specific perf counter IRQ */
51#define LOONGSON2_PERFCNT_IRQ (MIPS_CPU_IRQ_BASE + 6)
52
53#endif /* __ASM_MACH_LOONGSON_LOONGSON_H */
diff --git a/arch/mips/include/asm/mach-loongson/mc146818rtc.h b/arch/mips/include/asm/mach-loongson/mc146818rtc.h
new file mode 100644
index 000000000000..ed7fe978335a
--- /dev/null
+++ b/arch/mips/include/asm/mach-loongson/mc146818rtc.h
@@ -0,0 +1,36 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1998, 2001, 03, 07 by Ralf Baechle (ralf@linux-mips.org)
7 *
8 * RTC routines for PC style attached Dallas chip.
9 */
10#ifndef __ASM_MACH_LOONGSON_MC146818RTC_H
11#define __ASM_MACH_LOONGSON_MC146818RTC_H
12
13#include <linux/io.h>
14
15#define RTC_PORT(x) (0x70 + (x))
16#define RTC_IRQ 8
17
18static inline unsigned char CMOS_READ(unsigned long addr)
19{
20 outb_p(addr, RTC_PORT(0));
21 return inb_p(RTC_PORT(1));
22}
23
24static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
25{
26 outb_p(addr, RTC_PORT(0));
27 outb_p(data, RTC_PORT(1));
28}
29
30#define RTC_ALWAYS_BCD 0
31
32#ifndef mc146818_decode_year
33#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1970)
34#endif
35
36#endif /* __ASM_MACH_LOONGSON_MC146818RTC_H */
diff --git a/arch/mips/include/asm/mach-loongson/pci.h b/arch/mips/include/asm/mach-loongson/pci.h
new file mode 100644
index 000000000000..e229b2904cc9
--- /dev/null
+++ b/arch/mips/include/asm/mach-loongson/pci.h
@@ -0,0 +1,31 @@
1/*
2 * Copyright (c) 2008 Zhang Le <r0bertz@gentoo.org>
3 *
4 * This program is free software; you can redistribute it
5 * and/or modify it under the terms of the GNU General
6 * Public License as published by the Free Software
7 * Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 * This program is distributed in the hope that it will be
11 * useful, but WITHOUT ANY WARRANTY; without even the implied
12 * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
13 * PURPOSE. See the GNU General Public License for more
14 * details.
15 *
16 * You should have received a copy of the GNU General Public
17 * License along with this program; if not, write to the Free
18 * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA
19 * 02139, USA.
20 */
21
22#ifndef __ASM_MACH_LOONGSON_PCI_H_
23#define __ASM_MACH_LOONGSON_PCI_H_
24
25extern struct pci_ops bonito64_pci_ops;
26
27#define LOONGSON2E_PCI_MEM_START BONITO_PCILO1_BASE
28#define LOONGSON2E_PCI_MEM_END (BONITO_PCILO1_BASE + 0x04000000 * 2)
29#define LOONGSON2E_PCI_IO_START 0x00004000UL
30
31#endif /* !__ASM_MACH_LOONGSON_PCI_H_ */
diff --git a/arch/mips/include/asm/mach-loongson/war.h b/arch/mips/include/asm/mach-loongson/war.h
new file mode 100644
index 000000000000..4b971c3ffd8d
--- /dev/null
+++ b/arch/mips/include/asm/mach-loongson/war.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MACH_LOONGSON_WAR_H
9#define __ASM_MACH_LOONGSON_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define RM9000_CDEX_SMP_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 0
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MACH_LEMOTE_WAR_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-13 17:36:57 -0500