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authorIngo Molnar <mingo@elte.hu>2008-10-12 09:05:39 -0400
committerIngo Molnar <mingo@elte.hu>2008-10-12 09:05:39 -0400
commita9b9e81c915e4a57ac3b21d1a7fa7ff184639780 (patch)
tree98304395fbb5b9c74fca35b196cd414c1949f280 /arch/mips/include/asm/mach-lemote
parenta8b71a2810386a5ac8f43d2095fe3355f0d8db37 (diff)
parentfd048088306656824958e7783ffcee27e241b361 (diff)
Merge branch 'linus' into x86/memory-corruption-check
Diffstat (limited to 'arch/mips/include/asm/mach-lemote')
-rw-r--r--arch/mips/include/asm/mach-lemote/dma-coherence.h42
-rw-r--r--arch/mips/include/asm/mach-lemote/mc146818rtc.h36
-rw-r--r--arch/mips/include/asm/mach-lemote/war.h25
3 files changed, 103 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-lemote/dma-coherence.h b/arch/mips/include/asm/mach-lemote/dma-coherence.h
new file mode 100644
index 000000000000..7e914777ebc4
--- /dev/null
+++ b/arch/mips/include/asm/mach-lemote/dma-coherence.h
@@ -0,0 +1,42 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2006, 07 Ralf Baechle <ralf@linux-mips.org>
7 * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
8 * Author: Fuxin Zhang, zhangfx@lemote.com
9 *
10 */
11#ifndef __ASM_MACH_LEMOTE_DMA_COHERENCE_H
12#define __ASM_MACH_LEMOTE_DMA_COHERENCE_H
13
14struct device;
15
16static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr,
17 size_t size)
18{
19 return virt_to_phys(addr) | 0x80000000;
20}
21
22static inline dma_addr_t plat_map_dma_mem_page(struct device *dev,
23 struct page *page)
24{
25 return page_to_phys(page) | 0x80000000;
26}
27
28static inline unsigned long plat_dma_addr_to_phys(dma_addr_t dma_addr)
29{
30 return dma_addr & 0x7fffffff;
31}
32
33static inline void plat_unmap_dma_mem(dma_addr_t dma_addr)
34{
35}
36
37static inline int plat_device_is_coherent(struct device *dev)
38{
39 return 0;
40}
41
42#endif /* __ASM_MACH_LEMOTE_DMA_COHERENCE_H */
diff --git a/arch/mips/include/asm/mach-lemote/mc146818rtc.h b/arch/mips/include/asm/mach-lemote/mc146818rtc.h
new file mode 100644
index 000000000000..ed5147e11085
--- /dev/null
+++ b/arch/mips/include/asm/mach-lemote/mc146818rtc.h
@@ -0,0 +1,36 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1998, 2001, 03, 07 by Ralf Baechle (ralf@linux-mips.org)
7 *
8 * RTC routines for PC style attached Dallas chip.
9 */
10#ifndef __ASM_MACH_LEMOTE_MC146818RTC_H
11#define __ASM_MACH_LEMOTE_MC146818RTC_H
12
13#include <linux/io.h>
14
15#define RTC_PORT(x) (0x70 + (x))
16#define RTC_IRQ 8
17
18static inline unsigned char CMOS_READ(unsigned long addr)
19{
20 outb_p(addr, RTC_PORT(0));
21 return inb_p(RTC_PORT(1));
22}
23
24static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
25{
26 outb_p(addr, RTC_PORT(0));
27 outb_p(data, RTC_PORT(1));
28}
29
30#define RTC_ALWAYS_BCD 0
31
32#ifndef mc146818_decode_year
33#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1970)
34#endif
35
36#endif /* __ASM_MACH_LEMOTE_MC146818RTC_H */
diff --git a/arch/mips/include/asm/mach-lemote/war.h b/arch/mips/include/asm/mach-lemote/war.h
new file mode 100644
index 000000000000..05f89e0f2a11
--- /dev/null
+++ b/arch/mips/include/asm/mach-lemote/war.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_LEMOTE_WAR_H
9#define __ASM_MIPS_MACH_LEMOTE_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define RM9000_CDEX_SMP_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 0
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MIPS_MACH_LEMOTE_WAR_H */