diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-03-02 10:44:16 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-03-02 10:44:16 -0500 |
commit | aebb2afd5420c860b7fbc3882a323ef1247fbf16 (patch) | |
tree | 05ee0efcebca5ec421de44de7a6d6271088c64a8 /arch/mips/include/asm/mach-lantiq/war.h | |
parent | 8eae508b7c6ff502a71d0293b69e97c5505d5840 (diff) | |
parent | edb15d83a875a1f4b1576188844db5c330c3267d (diff) |
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:
o Add basic support for the Mediatek/Ralink Wireless SoC family.
o The Qualcomm Atheros platform is extended by support for the new
QCA955X SoC series as well as a bunch of patches that get the code
ready for OF support.
o Lantiq and BCM47XX platform have a few improvements and bug fixes.
o MIPS has sent a few patches that get the kernel ready for the
upcoming microMIPS support.
o The rest of the series is made up of small bug fixes and cleanups
that relate to various parts of the MIPS code. The biggy in there is
a whitespace cleanup. After I was sent another set of whitespace
cleanup patches I decided it was the time to clean the whitespace
"issues" for once and and that touches many files below arch/mips/.
Fix up silly conflicts, mostly due to whitespace cleanups.
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (105 commits)
MIPS: Quit exporting kernel internel break codes to uapi/asm/break.h
MIPS: remove broken conditional inside vpe loader code
MIPS: SMTC: fix implicit declaration of set_vi_handler
MIPS: early_printk: drop __init annotations
MIPS: Probe for and report hardware virtualization support.
MIPS: ath79: add support for the Qualcomm Atheros AP136-010 board
MIPS: ath79: add USB controller registration code for the QCA955X SoCs
MIPS: ath79: add PCI controller registration code for the QCA955X SoCs
MIPS: ath79: add WMAC registration code for the QCA955X SoCs
MIPS: ath79: register UART for the QCA955X SoCs
MIPS: ath79: add QCA955X specific glue to ath79_device_reset_{set, clear}
MIPS: ath79: add GPIO setup code for the QCA955X SoCs
MIPS: ath79: add IRQ handling code for the QCA955X SoCs
MIPS: ath79: add clock setup code for the QCA955X SoCs
MIPS: ath79: add SoC detection code for the QCA955X SoCs
MIPS: ath79: add early printk support for the QCA955X SoCs
MIPS: ath79: fix WMAC IRQ resource assignment
mips: reserve elfcorehdr
mips: Make sure kernel memory is in iomem
MIPS: ath79: use dynamically allocated USB platform devices
...
Diffstat (limited to 'arch/mips/include/asm/mach-lantiq/war.h')
-rw-r--r-- | arch/mips/include/asm/mach-lantiq/war.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/mips/include/asm/mach-lantiq/war.h b/arch/mips/include/asm/mach-lantiq/war.h index b6c568c280ef..358ca979c1bd 100644 --- a/arch/mips/include/asm/mach-lantiq/war.h +++ b/arch/mips/include/asm/mach-lantiq/war.h | |||
@@ -7,17 +7,17 @@ | |||
7 | #ifndef __ASM_MIPS_MACH_LANTIQ_WAR_H | 7 | #ifndef __ASM_MIPS_MACH_LANTIQ_WAR_H |
8 | #define __ASM_MIPS_MACH_LANTIQ_WAR_H | 8 | #define __ASM_MIPS_MACH_LANTIQ_WAR_H |
9 | 9 | ||
10 | #define R4600_V1_INDEX_ICACHEOP_WAR 0 | 10 | #define R4600_V1_INDEX_ICACHEOP_WAR 0 |
11 | #define R4600_V1_HIT_CACHEOP_WAR 0 | 11 | #define R4600_V1_HIT_CACHEOP_WAR 0 |
12 | #define R4600_V2_HIT_CACHEOP_WAR 0 | 12 | #define R4600_V2_HIT_CACHEOP_WAR 0 |
13 | #define R5432_CP0_INTERRUPT_WAR 0 | 13 | #define R5432_CP0_INTERRUPT_WAR 0 |
14 | #define BCM1250_M3_WAR 0 | 14 | #define BCM1250_M3_WAR 0 |
15 | #define SIBYTE_1956_WAR 0 | 15 | #define SIBYTE_1956_WAR 0 |
16 | #define MIPS4K_ICACHE_REFILL_WAR 0 | 16 | #define MIPS4K_ICACHE_REFILL_WAR 0 |
17 | #define MIPS_CACHE_SYNC_WAR 0 | 17 | #define MIPS_CACHE_SYNC_WAR 0 |
18 | #define TX49XX_ICACHE_INDEX_INV_WAR 0 | 18 | #define TX49XX_ICACHE_INDEX_INV_WAR 0 |
19 | #define ICACHE_REFILLS_WORKAROUND_WAR 0 | 19 | #define ICACHE_REFILLS_WORKAROUND_WAR 0 |
20 | #define R10000_LLSC_WAR 0 | 20 | #define R10000_LLSC_WAR 0 |
21 | #define MIPS34K_MISSED_ITLB_WAR 0 | 21 | #define MIPS34K_MISSED_ITLB_WAR 0 |
22 | 22 | ||
23 | #endif | 23 | #endif |