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authorIngo Molnar <mingo@elte.hu>2008-10-13 04:52:30 -0400
committerIngo Molnar <mingo@elte.hu>2008-10-13 04:52:30 -0400
commitc493756e2a8a78bcaae30668317890dcfe86e7c3 (patch)
tree8fb40782e79472ed882ff2098d4dd295557278ee /arch/mips/include/asm/mach-ip28/war.h
parent0d15504f16f68725e4635aa85411015d1c573b0a (diff)
parent4480f15b3306f43bbb0310d461142b4e897ca45b (diff)
Merge branch 'linus' into oprofile
Conflicts: arch/x86/kernel/apic_32.c include/linux/pci_ids.h
Diffstat (limited to 'arch/mips/include/asm/mach-ip28/war.h')
-rw-r--r--arch/mips/include/asm/mach-ip28/war.h25
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-ip28/war.h b/arch/mips/include/asm/mach-ip28/war.h
new file mode 100644
index 000000000000..a1baafab486a
--- /dev/null
+++ b/arch/mips/include/asm/mach-ip28/war.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_IP28_WAR_H
9#define __ASM_MIPS_MACH_IP28_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define RM9000_CDEX_SMP_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 0
22#define R10000_LLSC_WAR 1
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MIPS_MACH_IP28_WAR_H */