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authorRalf Baechle <ralf@linux-mips.org>2012-08-20 10:25:14 -0400
committerRalf Baechle <ralf@linux-mips.org>2012-10-11 05:10:43 -0400
commit475032564ed96c94c085e3e7a90e07d150a7cec9 (patch)
tree36b66d585f6aef09205fb0ef525e781fa55f0b07 /arch/mips/include/asm/mach-ip27
parentee80f7c73dc1b1f0ba9f82079c9bd1c0d1aedef8 (diff)
MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required.
Most supported systems currently hardwire cpu_has_dsp to 0, so we also can disable support for cpu_has_dsp2 resulting in a slightly smaller kernel. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mach-ip27')
-rw-r--r--arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h
index 7d3112b148d9..1d2b6ff60d33 100644
--- a/arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h
@@ -26,6 +26,7 @@
26#define cpu_has_dc_aliases 0 26#define cpu_has_dc_aliases 0
27#define cpu_has_ic_fills_f_dc 0 27#define cpu_has_ic_fills_f_dc 0
28#define cpu_has_dsp 0 28#define cpu_has_dsp 0
29#define cpu_has_dsp2 0
29#define cpu_icache_snoops_remote_store 1 30#define cpu_icache_snoops_remote_store 1
30#define cpu_has_mipsmt 0 31#define cpu_has_mipsmt 0
31#define cpu_has_userlocal 0 32#define cpu_has_userlocal 0