diff options
author | David Daney <david.daney@cavium.com> | 2012-07-05 12:12:38 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2012-07-23 08:54:52 -0400 |
commit | f5e08284211b09bc4aa85727a44293c529cfa923 (patch) | |
tree | fc965484d13e520aefc52aeab1e573d0c68bc8ae /arch/mips/include/asm/mach-cavium-octeon | |
parent | 0b28b823ac5bd4f9b2876ce9432ff2006c529f06 (diff) |
MIPS: OCTEON: Remove unneeded OCTEON_IRQ_* defines.
The follow-on patch to add irq_domain support will be the supported
method for using these irq lines, so get these defines out of the way
in preperation for that.
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3930/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mach-cavium-octeon')
-rw-r--r-- | arch/mips/include/asm/mach-cavium-octeon/irq.h | 40 |
1 files changed, 2 insertions, 38 deletions
diff --git a/arch/mips/include/asm/mach-cavium-octeon/irq.h b/arch/mips/include/asm/mach-cavium-octeon/irq.h index 81a032490b92..418992042f6f 100644 --- a/arch/mips/include/asm/mach-cavium-octeon/irq.h +++ b/arch/mips/include/asm/mach-cavium-octeon/irq.h | |||
@@ -41,59 +41,23 @@ enum octeon_irq { | |||
41 | OCTEON_IRQ_TWSI, | 41 | OCTEON_IRQ_TWSI, |
42 | OCTEON_IRQ_TWSI2, | 42 | OCTEON_IRQ_TWSI2, |
43 | OCTEON_IRQ_RML, | 43 | OCTEON_IRQ_RML, |
44 | OCTEON_IRQ_TRACE0, | ||
45 | OCTEON_IRQ_GMX_DRP0 = OCTEON_IRQ_TRACE0 + 4, | ||
46 | OCTEON_IRQ_IPD_DRP = OCTEON_IRQ_GMX_DRP0 + 5, | ||
47 | OCTEON_IRQ_KEY_ZERO, | ||
48 | OCTEON_IRQ_TIMER0, | 44 | OCTEON_IRQ_TIMER0, |
49 | OCTEON_IRQ_TIMER1, | 45 | OCTEON_IRQ_TIMER1, |
50 | OCTEON_IRQ_TIMER2, | 46 | OCTEON_IRQ_TIMER2, |
51 | OCTEON_IRQ_TIMER3, | 47 | OCTEON_IRQ_TIMER3, |
52 | OCTEON_IRQ_USB0, | 48 | OCTEON_IRQ_USB0, |
53 | OCTEON_IRQ_USB1, | 49 | OCTEON_IRQ_USB1, |
54 | OCTEON_IRQ_PCM, | ||
55 | OCTEON_IRQ_MPI, | ||
56 | OCTEON_IRQ_POWIQ, | ||
57 | OCTEON_IRQ_IPDPPTHR, | ||
58 | OCTEON_IRQ_MII0, | 50 | OCTEON_IRQ_MII0, |
59 | OCTEON_IRQ_MII1, | 51 | OCTEON_IRQ_MII1, |
60 | OCTEON_IRQ_BOOTDMA, | 52 | OCTEON_IRQ_BOOTDMA, |
61 | |||
62 | OCTEON_IRQ_NAND, | ||
63 | OCTEON_IRQ_MIO, /* Summary of MIO_BOOT_ERR */ | ||
64 | OCTEON_IRQ_IOB, /* Summary of IOB_INT_SUM */ | ||
65 | OCTEON_IRQ_FPA, /* Summary of FPA_INT_SUM */ | ||
66 | OCTEON_IRQ_POW, /* Summary of POW_ECC_ERR */ | ||
67 | OCTEON_IRQ_L2C, /* Summary of L2C_INT_STAT */ | ||
68 | OCTEON_IRQ_IPD, /* Summary of IPD_INT_SUM */ | ||
69 | OCTEON_IRQ_PIP, /* Summary of PIP_INT_REG */ | ||
70 | OCTEON_IRQ_PKO, /* Summary of PKO_REG_ERROR */ | ||
71 | OCTEON_IRQ_ZIP, /* Summary of ZIP_ERROR */ | ||
72 | OCTEON_IRQ_TIM, /* Summary of TIM_REG_ERROR */ | ||
73 | OCTEON_IRQ_RAD, /* Summary of RAD_REG_ERROR */ | ||
74 | OCTEON_IRQ_KEY, /* Summary of KEY_INT_SUM */ | ||
75 | OCTEON_IRQ_DFA, /* Summary of DFA */ | ||
76 | OCTEON_IRQ_USBCTL, /* Summary of USBN0_INT_SUM */ | ||
77 | OCTEON_IRQ_SLI, /* Summary of SLI_INT_SUM */ | ||
78 | OCTEON_IRQ_DPI, /* Summary of DPI_INT_SUM */ | ||
79 | OCTEON_IRQ_AGX0, /* Summary of GMX0*+PCS0_INT*_REG */ | ||
80 | OCTEON_IRQ_AGL = OCTEON_IRQ_AGX0 + 5, | ||
81 | OCTEON_IRQ_PTP, | ||
82 | OCTEON_IRQ_PEM0, | ||
83 | OCTEON_IRQ_PEM1, | ||
84 | OCTEON_IRQ_SRIO0, | ||
85 | OCTEON_IRQ_SRIO1, | ||
86 | OCTEON_IRQ_LMC0, | ||
87 | OCTEON_IRQ_DFM = OCTEON_IRQ_LMC0 + 4, /* Summary of DFM */ | ||
88 | OCTEON_IRQ_RST, | ||
89 | #ifndef CONFIG_PCI_MSI | 53 | #ifndef CONFIG_PCI_MSI |
90 | OCTEON_IRQ_LAST = 127 | 54 | OCTEON_IRQ_LAST = 127 |
91 | #endif | 55 | #endif |
92 | }; | 56 | }; |
93 | 57 | ||
94 | #ifdef CONFIG_PCI_MSI | 58 | #ifdef CONFIG_PCI_MSI |
95 | /* 152 - 407 represent the MSI interrupts 0-255 */ | 59 | /* 256 - 511 represent the MSI interrupts 0-255 */ |
96 | #define OCTEON_IRQ_MSI_BIT0 (OCTEON_IRQ_RST + 1) | 60 | #define OCTEON_IRQ_MSI_BIT0 (256) |
97 | 61 | ||
98 | #define OCTEON_IRQ_MSI_LAST (OCTEON_IRQ_MSI_BIT0 + 255) | 62 | #define OCTEON_IRQ_MSI_LAST (OCTEON_IRQ_MSI_BIT0 + 255) |
99 | #define OCTEON_IRQ_LAST (OCTEON_IRQ_MSI_LAST + 1) | 63 | #define OCTEON_IRQ_LAST (OCTEON_IRQ_MSI_LAST + 1) |