diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-10-15 13:22:21 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-10-15 13:22:21 -0400 |
| commit | 04ab591808565f968d4406f6435090ad671ebdab (patch) | |
| tree | 60aebaba3ae0911641ce18c6f04a361a278bc60a /arch/mips/include/asm/mach-bcm47xx/war.h | |
| parent | 7c3b1dcf13d5660152e02c6dea47b0bd9fd5d871 (diff) | |
| parent | 08da6f1bdddca14ba0fe28a5f6c41aa163aa27d3 (diff) | |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
MIPS: Kill unused <asm/debug.h> inclusions
MIPS: IP32: Add platform device for CMOS RTC; remove dead code
RTC: M48T35: new RTC driver
MIPS: IP27: Switch over to RTC class driver
MIPS: DS1286: New RTC driver
MIPS: IP22/28: Switch over to RTC class driver
MIPS: PCI: Scan busses when they are registered
MIPS: WGT634U: Add reset button support
MIPS: BCM47xx: Use the new SSB GPIO API
MIPS: BCM47xx: Remove references to BCM947XX
MIPS: WGT634U: Add machine detection message
MIPS: Align .data.cacheline_aligned based on CONFIG_MIPS_L1_CACHE_SHIFT
MIPS: show_cpuinfo prints the type of the calling CPU
MIPS: Fix wrong branch target in new spin_lock code.
MIPS: Have a heart for a lonely, lost header file ...
Diffstat (limited to 'arch/mips/include/asm/mach-bcm47xx/war.h')
| -rw-r--r-- | arch/mips/include/asm/mach-bcm47xx/war.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/include/asm/mach-bcm47xx/war.h b/arch/mips/include/asm/mach-bcm47xx/war.h index 4a2b7986b582..87cd4651dda3 100644 --- a/arch/mips/include/asm/mach-bcm47xx/war.h +++ b/arch/mips/include/asm/mach-bcm47xx/war.h | |||
| @@ -5,8 +5,8 @@ | |||
| 5 | * | 5 | * |
| 6 | * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org> | 6 | * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org> |
| 7 | */ | 7 | */ |
| 8 | #ifndef __ASM_MIPS_MACH_BCM947XX_WAR_H | 8 | #ifndef __ASM_MIPS_MACH_BCM47XX_WAR_H |
| 9 | #define __ASM_MIPS_MACH_BCM947XX_WAR_H | 9 | #define __ASM_MIPS_MACH_BCM47XX_WAR_H |
| 10 | 10 | ||
| 11 | #define R4600_V1_INDEX_ICACHEOP_WAR 0 | 11 | #define R4600_V1_INDEX_ICACHEOP_WAR 0 |
| 12 | #define R4600_V1_HIT_CACHEOP_WAR 0 | 12 | #define R4600_V1_HIT_CACHEOP_WAR 0 |
| @@ -22,4 +22,4 @@ | |||
| 22 | #define R10000_LLSC_WAR 0 | 22 | #define R10000_LLSC_WAR 0 |
| 23 | #define MIPS34K_MISSED_ITLB_WAR 0 | 23 | #define MIPS34K_MISSED_ITLB_WAR 0 |
| 24 | 24 | ||
| 25 | #endif /* __ASM_MIPS_MACH_BCM947XX_WAR_H */ | 25 | #endif /* __ASM_MIPS_MACH_BCM47XX_WAR_H */ |