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author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-18 17:28:48 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-18 17:28:48 -0500 |
commit | 5d7e8af3c5727626b9e7f909c778b9ac9b4a1809 (patch) | |
tree | 13d51e31ee070113538a6d26d9a52503ba4a3cd0 /arch/mips/include/asm/inst.h | |
parent | aa891f6b3f440402c6879ad1ecf332d318137422 (diff) | |
parent | 79aa18d557bef02171da42ee928c23509e6ef4f7 (diff) |
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: (26 commits)
MIPS: Malta: enable Cirrus FB console
MIPS: add CONFIG_VIRTUALIZATION for virtio support
MIPS: Implement __read_mostly
MIPS: ath79: add common WMAC device for AR913X based boards
MIPS: ath79: Add initial support for the Atheros AP81 reference board
MIPS: ath79: add common SPI controller device
SPI: Add SPI controller driver for the Atheros AR71XX/AR724X/AR913X SoCs
MIPS: ath79: add common GPIO buttons device
MIPS: ath79: add common watchdog device
MIPS: ath79: add common GPIO LEDs device
MIPS: ath79: add initial support for the Atheros PB44 reference board
MIPS: ath79: utilize the MIPS multi-machine support
MIPS: ath79: add GPIOLIB support
MIPS: Add initial support for the Atheros AR71XX/AR724X/AR931X SoCs
MIPS: jump label: Add MIPS support.
MIPS: Use WARN() in uasm for better diagnostics.
MIPS: Optimize TLB handlers for Octeon CPUs
MIPS: Add LDX and LWX instructions to uasm.
MIPS: Use BBIT instructions in TLB handlers
MIPS: Declare uasm bbit0 and bbit1 functions.
...
Diffstat (limited to 'arch/mips/include/asm/inst.h')
-rw-r--r-- | arch/mips/include/asm/inst.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/mips/include/asm/inst.h b/arch/mips/include/asm/inst.h index 444ff71aa0e8..7ebfc392e58d 100644 --- a/arch/mips/include/asm/inst.h +++ b/arch/mips/include/asm/inst.h | |||
@@ -72,6 +72,7 @@ enum spec2_op { | |||
72 | enum spec3_op { | 72 | enum spec3_op { |
73 | ext_op, dextm_op, dextu_op, dext_op, | 73 | ext_op, dextm_op, dextu_op, dext_op, |
74 | ins_op, dinsm_op, dinsu_op, dins_op, | 74 | ins_op, dinsm_op, dinsu_op, dins_op, |
75 | lx_op = 0x0a, | ||
75 | bshfl_op = 0x20, | 76 | bshfl_op = 0x20, |
76 | dbshfl_op = 0x24, | 77 | dbshfl_op = 0x24, |
77 | rdhwr_op = 0x3b | 78 | rdhwr_op = 0x3b |
@@ -179,6 +180,19 @@ enum mad_func { | |||
179 | }; | 180 | }; |
180 | 181 | ||
181 | /* | 182 | /* |
183 | * func field for special3 lx opcodes (Cavium Octeon). | ||
184 | */ | ||
185 | enum lx_func { | ||
186 | lwx_op = 0x00, | ||
187 | lhx_op = 0x04, | ||
188 | lbux_op = 0x06, | ||
189 | ldx_op = 0x08, | ||
190 | lwux_op = 0x10, | ||
191 | lhux_op = 0x14, | ||
192 | lbx_op = 0x16, | ||
193 | }; | ||
194 | |||
195 | /* | ||
182 | * Damn ... bitfields depend from byteorder :-( | 196 | * Damn ... bitfields depend from byteorder :-( |
183 | */ | 197 | */ |
184 | #ifdef __MIPSEB__ | 198 | #ifdef __MIPSEB__ |