diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-10-11 12:19:02 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-10-11 12:19:02 -0400 |
commit | 835a1c092432b3293ba6c4dec45ee6869c6f61fd (patch) | |
tree | a48582e4e4de3a8924b700c5ccaae78cd299cd73 /arch/mips/include/asm/edac.h | |
parent | d3570a5a7b8d0604fa012129f92637dc1534f62c (diff) | |
parent | 9609e74093abd9f61fb1d20a8915a8ea87c77d5a (diff) |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (49 commits)
MIPS: RB532: provide GPIO_BUILTIN_NR and irq_to_gpio/gpio_to_irq
MIPS: Move ptrace prototypes to ptrace.h
MIPS: Ptrace support for HARDWARE_WATCHPOINTS
MIPS: Scheduler support for HARDWARE_WATCHPOINTS.
MIPS: Watch exception handling for HARDWARE_WATCHPOINTS.
MIPS: Probe watch registers and report configuration.
MIPS: Add HARDWARE_WATCHPOINTS definitions and support code.
MIPS: Add HARDWARE_WATCHPOINTS configure option.
MIPS: Replace use of <asm-generic/uaccess.h> with native implementations.
MIPS: TXx9: Add TX4939 ATA support (v2)
MIPS: Rewrite spinlocks to ticket locks.
MIPS: IP checksums: Optimize adjust of sum on buffers of odd alignment.
MIPS: IP checksums: Remove unncessary .set pseudos
MIPS: IP checksums: Remove unncessary folding of sum to 16 bit.
MIPS: Move headfiles to new location below arch/mips/include
MIPS: Alchemy: rename directory
MIPS: Optimize get_user and put_user for 64-bit
MIPS: TXx9: Implement prom_free_prom_memory
MIPS: TXx9: Add RBTX4939 board support
MIPS: TXx9: Add TX4939 SoC support
...
Diffstat (limited to 'arch/mips/include/asm/edac.h')
-rw-r--r-- | arch/mips/include/asm/edac.h | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/arch/mips/include/asm/edac.h b/arch/mips/include/asm/edac.h new file mode 100644 index 000000000000..4da0c1fe30d9 --- /dev/null +++ b/arch/mips/include/asm/edac.h | |||
@@ -0,0 +1,34 @@ | |||
1 | #ifndef ASM_EDAC_H | ||
2 | #define ASM_EDAC_H | ||
3 | |||
4 | /* ECC atomic, DMA, SMP and interrupt safe scrub function */ | ||
5 | |||
6 | static inline void atomic_scrub(void *va, u32 size) | ||
7 | { | ||
8 | unsigned long *virt_addr = va; | ||
9 | unsigned long temp; | ||
10 | u32 i; | ||
11 | |||
12 | for (i = 0; i < size / sizeof(unsigned long); i++) { | ||
13 | /* | ||
14 | * Very carefully read and write to memory atomically | ||
15 | * so we are interrupt, DMA and SMP safe. | ||
16 | * | ||
17 | * Intel: asm("lock; addl $0, %0"::"m"(*virt_addr)); | ||
18 | */ | ||
19 | |||
20 | __asm__ __volatile__ ( | ||
21 | " .set mips2 \n" | ||
22 | "1: ll %0, %1 # atomic_scrub \n" | ||
23 | " addu %0, $0 \n" | ||
24 | " sc %0, %1 \n" | ||
25 | " beqz %0, 1b \n" | ||
26 | " .set mips0 \n" | ||
27 | : "=&r" (temp), "=m" (*virt_addr) | ||
28 | : "m" (*virt_addr)); | ||
29 | |||
30 | virt_addr++; | ||
31 | } | ||
32 | } | ||
33 | |||
34 | #endif | ||