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authorJayachandran C <jayachandranc@netlogicmicro.com>2011-11-15 19:21:20 -0500
committerRalf Baechle <ralf@linux-mips.org>2011-12-07 17:04:55 -0500
commita3d4fb2d2a4c52b22cde90049a78e323cde187e5 (patch)
treee5ed7235b8f8a0b29b9aad11b4d1f57ef2f59809 /arch/mips/include/asm/cpu.h
parent0be3d9bb1460a87170a1b78b9ab12cb0ac02c2dc (diff)
MIPS: Netlogic: XLP CPU support.
Add support for Netlogic's XLP MIPS SoC. This patch adds: * XLP processor ID in cpu_probe.c and asm/cpu.h * XLP case to asm/module.h * CPU_XLP case to mm/tlbex.c * minor change to r4k cache handling to ignore XLP secondary cache * XLP cpu overrides to mach-netlogic/cpu-feature-overrides.h Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2966/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/cpu.h')
-rw-r--r--arch/mips/include/asm/cpu.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index 2f7f41873f24..6e94c7e2c164 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -170,6 +170,7 @@
170#define PRID_IMP_NETLOGIC_XLS408B 0x4e00 170#define PRID_IMP_NETLOGIC_XLS408B 0x4e00
171#define PRID_IMP_NETLOGIC_XLS404B 0x4f00 171#define PRID_IMP_NETLOGIC_XLS404B 0x4f00
172 172
173#define PRID_IMP_NETLOGIC_XLP832 0x1000
173/* 174/*
174 * Definitions for 7:0 on legacy processors 175 * Definitions for 7:0 on legacy processors
175 */ 176 */
@@ -263,7 +264,7 @@ enum cpu_type_enum {
263 */ 264 */
264 CPU_5KC, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2, 265 CPU_5KC, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2,
265 CPU_CAVIUM_OCTEON, CPU_CAVIUM_OCTEON_PLUS, CPU_CAVIUM_OCTEON2, 266 CPU_CAVIUM_OCTEON, CPU_CAVIUM_OCTEON_PLUS, CPU_CAVIUM_OCTEON2,
266 CPU_XLR, 267 CPU_XLR, CPU_XLP,
267 268
268 CPU_LAST 269 CPU_LAST
269}; 270};