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authorJames Morris <jmorris@namei.org>2009-06-08 19:27:53 -0400
committerJames Morris <jmorris@namei.org>2009-06-08 19:27:53 -0400
commit0b4ec6e4e01d98e55ae325a41304cccd87fa4c0f (patch)
tree1e075fdf4aaf0c5c003564b3f3414bb4a92ef2ed /arch/mips/include/asm/cpu-info.h
parent04288f42033607099cebf5ca15ce8dcec3a9688b (diff)
parent3af968e066d593bc4dacc021715f3e95ddf0996f (diff)
Merge branch 'master' into next
Diffstat (limited to 'arch/mips/include/asm/cpu-info.h')
-rw-r--r--arch/mips/include/asm/cpu-info.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h
index 744cd8fb107f..126044308dec 100644
--- a/arch/mips/include/asm/cpu-info.h
+++ b/arch/mips/include/asm/cpu-info.h
@@ -39,8 +39,8 @@ struct cache_desc {
39#define MIPS_CACHE_PINDEX 0x00000020 /* Physically indexed cache */ 39#define MIPS_CACHE_PINDEX 0x00000020 /* Physically indexed cache */
40 40
41struct cpuinfo_mips { 41struct cpuinfo_mips {
42 unsigned long udelay_val; 42 unsigned int udelay_val;
43 unsigned long asid_cache; 43 unsigned int asid_cache;
44 44
45 /* 45 /*
46 * Capability and feature descriptor structure for MIPS CPU 46 * Capability and feature descriptor structure for MIPS CPU