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authorIngo Molnar <mingo@elte.hu>2009-09-07 02:19:51 -0400
committerIngo Molnar <mingo@elte.hu>2009-09-07 02:19:51 -0400
commita1922ed661ab2c1637d0b10cde933bd9cd33d965 (patch)
tree0f1777542b385ebefd30b3586d830fd8ed6fda5b /arch/mips/include/asm/cpu-features.h
parent75e33751ca8bbb72dd6f1a74d2810ddc8cbe4bdf (diff)
parentd28daf923ac5e4a0d7cecebae56f3e339189366b (diff)
Merge branch 'tracing/core' into tracing/hw-breakpoints
Conflicts: arch/Kconfig kernel/trace/trace.h Merge reason: resolve the conflicts, plus adopt to the new ring-buffer APIs. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/mips/include/asm/cpu-features.h')
-rw-r--r--arch/mips/include/asm/cpu-features.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index c0047f861337..8ab1d12ba7f4 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -147,6 +147,10 @@
147#define cpu_has_mips_r (cpu_has_mips32r1 | cpu_has_mips32r2 | \ 147#define cpu_has_mips_r (cpu_has_mips32r1 | cpu_has_mips32r2 | \
148 cpu_has_mips64r1 | cpu_has_mips64r2) 148 cpu_has_mips64r1 | cpu_has_mips64r2)
149 149
150#ifndef cpu_has_mips_r2_exec_hazard
151#define cpu_has_mips_r2_exec_hazard cpu_has_mips_r2
152#endif
153
150/* 154/*
151 * MIPS32, MIPS64, VR5500, IDT32332, IDT32334 and maybe a few other 155 * MIPS32, MIPS64, VR5500, IDT32332, IDT32334 and maybe a few other
152 * pre-MIPS32/MIPS53 processors have CLO, CLZ. For 64-bit kernels 156 * pre-MIPS32/MIPS53 processors have CLO, CLZ. For 64-bit kernels
@@ -230,4 +234,8 @@
230#define cpu_scache_line_size() cpu_data[0].scache.linesz 234#define cpu_scache_line_size() cpu_data[0].scache.linesz
231#endif 235#endif
232 236
237#ifndef cpu_hwrena_impl_bits
238#define cpu_hwrena_impl_bits 0
239#endif
240
233#endif /* __ASM_CPU_FEATURES_H */ 241#endif /* __ASM_CPU_FEATURES_H */