diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2008-09-16 13:48:51 -0400 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2008-10-11 11:18:52 -0400 |
commit | 384740dc49ea651ba350704d13ff6be9976e37fe (patch) | |
tree | a6e80cad287ccae7a86d81bfa692fc96889c88ed /arch/mips/include/asm/asmmacro-64.h | |
parent | e8c7c482347574ecdd45c43e32c332d5fc2ece61 (diff) |
MIPS: Move headfiles to new location below arch/mips/include
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/asmmacro-64.h')
-rw-r--r-- | arch/mips/include/asm/asmmacro-64.h | 139 |
1 files changed, 139 insertions, 0 deletions
diff --git a/arch/mips/include/asm/asmmacro-64.h b/arch/mips/include/asm/asmmacro-64.h new file mode 100644 index 000000000000..225feefcb25d --- /dev/null +++ b/arch/mips/include/asm/asmmacro-64.h | |||
@@ -0,0 +1,139 @@ | |||
1 | /* | ||
2 | * asmmacro.h: Assembler macros to make things easier to read. | ||
3 | * | ||
4 | * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com) | ||
5 | * Copyright (C) 1998, 1999 Ralf Baechle | ||
6 | * Copyright (C) 1999 Silicon Graphics, Inc. | ||
7 | */ | ||
8 | #ifndef _ASM_ASMMACRO_64_H | ||
9 | #define _ASM_ASMMACRO_64_H | ||
10 | |||
11 | #include <asm/asm-offsets.h> | ||
12 | #include <asm/regdef.h> | ||
13 | #include <asm/fpregdef.h> | ||
14 | #include <asm/mipsregs.h> | ||
15 | |||
16 | .macro fpu_save_16even thread tmp=t0 | ||
17 | cfc1 \tmp, fcr31 | ||
18 | sdc1 $f0, THREAD_FPR0(\thread) | ||
19 | sdc1 $f2, THREAD_FPR2(\thread) | ||
20 | sdc1 $f4, THREAD_FPR4(\thread) | ||
21 | sdc1 $f6, THREAD_FPR6(\thread) | ||
22 | sdc1 $f8, THREAD_FPR8(\thread) | ||
23 | sdc1 $f10, THREAD_FPR10(\thread) | ||
24 | sdc1 $f12, THREAD_FPR12(\thread) | ||
25 | sdc1 $f14, THREAD_FPR14(\thread) | ||
26 | sdc1 $f16, THREAD_FPR16(\thread) | ||
27 | sdc1 $f18, THREAD_FPR18(\thread) | ||
28 | sdc1 $f20, THREAD_FPR20(\thread) | ||
29 | sdc1 $f22, THREAD_FPR22(\thread) | ||
30 | sdc1 $f24, THREAD_FPR24(\thread) | ||
31 | sdc1 $f26, THREAD_FPR26(\thread) | ||
32 | sdc1 $f28, THREAD_FPR28(\thread) | ||
33 | sdc1 $f30, THREAD_FPR30(\thread) | ||
34 | sw \tmp, THREAD_FCR31(\thread) | ||
35 | .endm | ||
36 | |||
37 | .macro fpu_save_16odd thread | ||
38 | sdc1 $f1, THREAD_FPR1(\thread) | ||
39 | sdc1 $f3, THREAD_FPR3(\thread) | ||
40 | sdc1 $f5, THREAD_FPR5(\thread) | ||
41 | sdc1 $f7, THREAD_FPR7(\thread) | ||
42 | sdc1 $f9, THREAD_FPR9(\thread) | ||
43 | sdc1 $f11, THREAD_FPR11(\thread) | ||
44 | sdc1 $f13, THREAD_FPR13(\thread) | ||
45 | sdc1 $f15, THREAD_FPR15(\thread) | ||
46 | sdc1 $f17, THREAD_FPR17(\thread) | ||
47 | sdc1 $f19, THREAD_FPR19(\thread) | ||
48 | sdc1 $f21, THREAD_FPR21(\thread) | ||
49 | sdc1 $f23, THREAD_FPR23(\thread) | ||
50 | sdc1 $f25, THREAD_FPR25(\thread) | ||
51 | sdc1 $f27, THREAD_FPR27(\thread) | ||
52 | sdc1 $f29, THREAD_FPR29(\thread) | ||
53 | sdc1 $f31, THREAD_FPR31(\thread) | ||
54 | .endm | ||
55 | |||
56 | .macro fpu_save_double thread status tmp | ||
57 | sll \tmp, \status, 5 | ||
58 | bgez \tmp, 2f | ||
59 | fpu_save_16odd \thread | ||
60 | 2: | ||
61 | fpu_save_16even \thread \tmp | ||
62 | .endm | ||
63 | |||
64 | .macro fpu_restore_16even thread tmp=t0 | ||
65 | lw \tmp, THREAD_FCR31(\thread) | ||
66 | ldc1 $f0, THREAD_FPR0(\thread) | ||
67 | ldc1 $f2, THREAD_FPR2(\thread) | ||
68 | ldc1 $f4, THREAD_FPR4(\thread) | ||
69 | ldc1 $f6, THREAD_FPR6(\thread) | ||
70 | ldc1 $f8, THREAD_FPR8(\thread) | ||
71 | ldc1 $f10, THREAD_FPR10(\thread) | ||
72 | ldc1 $f12, THREAD_FPR12(\thread) | ||
73 | ldc1 $f14, THREAD_FPR14(\thread) | ||
74 | ldc1 $f16, THREAD_FPR16(\thread) | ||
75 | ldc1 $f18, THREAD_FPR18(\thread) | ||
76 | ldc1 $f20, THREAD_FPR20(\thread) | ||
77 | ldc1 $f22, THREAD_FPR22(\thread) | ||
78 | ldc1 $f24, THREAD_FPR24(\thread) | ||
79 | ldc1 $f26, THREAD_FPR26(\thread) | ||
80 | ldc1 $f28, THREAD_FPR28(\thread) | ||
81 | ldc1 $f30, THREAD_FPR30(\thread) | ||
82 | ctc1 \tmp, fcr31 | ||
83 | .endm | ||
84 | |||
85 | .macro fpu_restore_16odd thread | ||
86 | ldc1 $f1, THREAD_FPR1(\thread) | ||
87 | ldc1 $f3, THREAD_FPR3(\thread) | ||
88 | ldc1 $f5, THREAD_FPR5(\thread) | ||
89 | ldc1 $f7, THREAD_FPR7(\thread) | ||
90 | ldc1 $f9, THREAD_FPR9(\thread) | ||
91 | ldc1 $f11, THREAD_FPR11(\thread) | ||
92 | ldc1 $f13, THREAD_FPR13(\thread) | ||
93 | ldc1 $f15, THREAD_FPR15(\thread) | ||
94 | ldc1 $f17, THREAD_FPR17(\thread) | ||
95 | ldc1 $f19, THREAD_FPR19(\thread) | ||
96 | ldc1 $f21, THREAD_FPR21(\thread) | ||
97 | ldc1 $f23, THREAD_FPR23(\thread) | ||
98 | ldc1 $f25, THREAD_FPR25(\thread) | ||
99 | ldc1 $f27, THREAD_FPR27(\thread) | ||
100 | ldc1 $f29, THREAD_FPR29(\thread) | ||
101 | ldc1 $f31, THREAD_FPR31(\thread) | ||
102 | .endm | ||
103 | |||
104 | .macro fpu_restore_double thread status tmp | ||
105 | sll \tmp, \status, 5 | ||
106 | bgez \tmp, 1f # 16 register mode? | ||
107 | |||
108 | fpu_restore_16odd \thread | ||
109 | 1: fpu_restore_16even \thread \tmp | ||
110 | .endm | ||
111 | |||
112 | .macro cpu_save_nonscratch thread | ||
113 | LONG_S s0, THREAD_REG16(\thread) | ||
114 | LONG_S s1, THREAD_REG17(\thread) | ||
115 | LONG_S s2, THREAD_REG18(\thread) | ||
116 | LONG_S s3, THREAD_REG19(\thread) | ||
117 | LONG_S s4, THREAD_REG20(\thread) | ||
118 | LONG_S s5, THREAD_REG21(\thread) | ||
119 | LONG_S s6, THREAD_REG22(\thread) | ||
120 | LONG_S s7, THREAD_REG23(\thread) | ||
121 | LONG_S sp, THREAD_REG29(\thread) | ||
122 | LONG_S fp, THREAD_REG30(\thread) | ||
123 | .endm | ||
124 | |||
125 | .macro cpu_restore_nonscratch thread | ||
126 | LONG_L s0, THREAD_REG16(\thread) | ||
127 | LONG_L s1, THREAD_REG17(\thread) | ||
128 | LONG_L s2, THREAD_REG18(\thread) | ||
129 | LONG_L s3, THREAD_REG19(\thread) | ||
130 | LONG_L s4, THREAD_REG20(\thread) | ||
131 | LONG_L s5, THREAD_REG21(\thread) | ||
132 | LONG_L s6, THREAD_REG22(\thread) | ||
133 | LONG_L s7, THREAD_REG23(\thread) | ||
134 | LONG_L sp, THREAD_REG29(\thread) | ||
135 | LONG_L fp, THREAD_REG30(\thread) | ||
136 | LONG_L ra, THREAD_REG31(\thread) | ||
137 | .endm | ||
138 | |||
139 | #endif /* _ASM_ASMMACRO_64_H */ | ||