diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2006-10-07 14:44:33 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2006-10-07 21:38:28 -0400 |
commit | 937a801576f954bd030d7c4a5a94571710d87c0b (patch) | |
tree | 48d3440f765b56cf32a89b4b8193dd033d8227a8 /arch/mips/gt64120 | |
parent | 31aa36658a123263a9a69896e348b9600e050679 (diff) |
[MIPS] Complete fixes after removal of pt_regs argument to int handlers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/gt64120')
-rw-r--r-- | arch/mips/gt64120/common/time.c | 5 | ||||
-rw-r--r-- | arch/mips/gt64120/ev64120/irq.c | 14 | ||||
-rw-r--r-- | arch/mips/gt64120/momenco_ocelot/irq.c | 22 | ||||
-rw-r--r-- | arch/mips/gt64120/wrppmc/irq.c | 10 |
4 files changed, 26 insertions, 25 deletions
diff --git a/arch/mips/gt64120/common/time.c b/arch/mips/gt64120/common/time.c index 7feca49350d1..b203169f19ce 100644 --- a/arch/mips/gt64120/common/time.c +++ b/arch/mips/gt64120/common/time.c | |||
@@ -10,6 +10,7 @@ | |||
10 | #include <linux/kernel.h> | 10 | #include <linux/kernel.h> |
11 | #include <linux/sched.h> | 11 | #include <linux/sched.h> |
12 | #include <linux/kernel_stat.h> | 12 | #include <linux/kernel_stat.h> |
13 | #include <asm/irq_regs.h> | ||
13 | #include <asm/ptrace.h> | 14 | #include <asm/ptrace.h> |
14 | #include <asm/gt64120.h> | 15 | #include <asm/gt64120.h> |
15 | 16 | ||
@@ -19,7 +20,7 @@ | |||
19 | * differently than other MIPS interrupts. | 20 | * differently than other MIPS interrupts. |
20 | */ | 21 | */ |
21 | 22 | ||
22 | static void gt64120_irq(int irq, void *dev_id, struct pt_regs *regs) | 23 | static void gt64120_irq(int irq, void *dev_id) |
23 | { | 24 | { |
24 | unsigned int irq_src, int_high_src, irq_src_mask, int_high_src_mask; | 25 | unsigned int irq_src, int_high_src, irq_src_mask, int_high_src_mask; |
25 | int handled = 0; | 26 | int handled = 0; |
@@ -36,7 +37,7 @@ static void gt64120_irq(int irq, void *dev_id, struct pt_regs *regs) | |||
36 | irq_src &= ~0x00000800; | 37 | irq_src &= ~0x00000800; |
37 | do_timer(1); | 38 | do_timer(1); |
38 | #ifndef CONFIG_SMP | 39 | #ifndef CONFIG_SMP |
39 | update_process_times(user_mode(regs)); | 40 | update_process_times(user_mode(get_irq_regs())); |
40 | #endif | 41 | #endif |
41 | } | 42 | } |
42 | 43 | ||
diff --git a/arch/mips/gt64120/ev64120/irq.c b/arch/mips/gt64120/ev64120/irq.c index 5d939ac58f3f..ed4d82b9a24a 100644 --- a/arch/mips/gt64120/ev64120/irq.c +++ b/arch/mips/gt64120/ev64120/irq.c | |||
@@ -46,22 +46,22 @@ | |||
46 | #include <asm/system.h> | 46 | #include <asm/system.h> |
47 | #include <asm/gt64120.h> | 47 | #include <asm/gt64120.h> |
48 | 48 | ||
49 | asmlinkage void plat_irq_dispatch(struct pt_regs *regs) | 49 | asmlinkage void plat_irq_dispatch(void) |
50 | { | 50 | { |
51 | unsigned int pending = read_c0_status() & read_c0_cause(); | 51 | unsigned int pending = read_c0_status() & read_c0_cause(); |
52 | 52 | ||
53 | if (pending & STATUSF_IP4) /* int2 hardware line (timer) */ | 53 | if (pending & STATUSF_IP4) /* int2 hardware line (timer) */ |
54 | do_IRQ(4, regs); | 54 | do_IRQ(4); |
55 | else if (pending & STATUSF_IP2) /* int0 hardware line */ | 55 | else if (pending & STATUSF_IP2) /* int0 hardware line */ |
56 | do_IRQ(GT_INTA, regs); | 56 | do_IRQ(GT_INTA); |
57 | else if (pending & STATUSF_IP5) /* int3 hardware line */ | 57 | else if (pending & STATUSF_IP5) /* int3 hardware line */ |
58 | do_IRQ(GT_INTD, regs); | 58 | do_IRQ(GT_INTD); |
59 | else if (pending & STATUSF_IP6) /* int4 hardware line */ | 59 | else if (pending & STATUSF_IP6) /* int4 hardware line */ |
60 | do_IRQ(6, regs); | 60 | do_IRQ(6); |
61 | else if (pending & STATUSF_IP7) /* compare int */ | 61 | else if (pending & STATUSF_IP7) /* compare int */ |
62 | do_IRQ(7, regs); | 62 | do_IRQ(7); |
63 | else | 63 | else |
64 | spurious_interrupt(regs); | 64 | spurious_interrupt(); |
65 | } | 65 | } |
66 | 66 | ||
67 | static void disable_ev64120_irq(unsigned int irq_nr) | 67 | static void disable_ev64120_irq(unsigned int irq_nr) |
diff --git a/arch/mips/gt64120/momenco_ocelot/irq.c b/arch/mips/gt64120/momenco_ocelot/irq.c index 885f67f32ea3..d9294401ccb0 100644 --- a/arch/mips/gt64120/momenco_ocelot/irq.c +++ b/arch/mips/gt64120/momenco_ocelot/irq.c | |||
@@ -48,22 +48,22 @@ | |||
48 | #include <asm/mipsregs.h> | 48 | #include <asm/mipsregs.h> |
49 | #include <asm/system.h> | 49 | #include <asm/system.h> |
50 | 50 | ||
51 | asmlinkage void plat_irq_dispatch(struct pt_regs *regs) | 51 | asmlinkage void plat_irq_dispatch(void) |
52 | { | 52 | { |
53 | unsigned int pending = read_c0_status() & read_c0_cause(); | 53 | unsigned int pending = read_c0_status() & read_c0_cause(); |
54 | 54 | ||
55 | if (pending & STATUSF_IP2) /* int0 hardware line */ | 55 | if (pending & STATUSF_IP2) /* int0 hardware line */ |
56 | do_IRQ(2, regs); | 56 | do_IRQ(2); |
57 | else if (pending & STATUSF_IP3) /* int1 hardware line */ | 57 | else if (pending & STATUSF_IP3) /* int1 hardware line */ |
58 | do_IRQ(3, regs); | 58 | do_IRQ(3); |
59 | else if (pending & STATUSF_IP4) /* int2 hardware line */ | 59 | else if (pending & STATUSF_IP4) /* int2 hardware line */ |
60 | do_IRQ(4, regs); | 60 | do_IRQ(4); |
61 | else if (pending & STATUSF_IP5) /* int3 hardware line */ | 61 | else if (pending & STATUSF_IP5) /* int3 hardware line */ |
62 | do_IRQ(5, regs); | 62 | do_IRQ(5); |
63 | else if (pending & STATUSF_IP6) /* int4 hardware line */ | 63 | else if (pending & STATUSF_IP6) /* int4 hardware line */ |
64 | do_IRQ(6, regs); | 64 | do_IRQ(6); |
65 | else if (pending & STATUSF_IP7) /* cpu timer */ | 65 | else if (pending & STATUSF_IP7) /* cpu timer */ |
66 | do_IRQ(7, regs); | 66 | do_IRQ(7); |
67 | else { | 67 | else { |
68 | /* | 68 | /* |
69 | * Now look at the extended interrupts | 69 | * Now look at the extended interrupts |
@@ -71,13 +71,13 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs) | |||
71 | pending = (read_c0_cause() & (read_c0_intcontrol() << 8)) >> 16; | 71 | pending = (read_c0_cause() & (read_c0_intcontrol() << 8)) >> 16; |
72 | 72 | ||
73 | if (pending & STATUSF_IP8) /* int6 hardware line */ | 73 | if (pending & STATUSF_IP8) /* int6 hardware line */ |
74 | do_IRQ(8, regs); | 74 | do_IRQ(8); |
75 | else if (pending & STATUSF_IP9) /* int7 hardware line */ | 75 | else if (pending & STATUSF_IP9) /* int7 hardware line */ |
76 | do_IRQ(9, regs); | 76 | do_IRQ(9); |
77 | else if (pending & STATUSF_IP10) /* int8 hardware line */ | 77 | else if (pending & STATUSF_IP10) /* int8 hardware line */ |
78 | do_IRQ(10, regs); | 78 | do_IRQ(10); |
79 | else if (pending & STATUSF_IP11) /* int9 hardware line */ | 79 | else if (pending & STATUSF_IP11) /* int9 hardware line */ |
80 | do_IRQ(11, regs); | 80 | do_IRQ(11); |
81 | } | 81 | } |
82 | } | 82 | } |
83 | 83 | ||
diff --git a/arch/mips/gt64120/wrppmc/irq.c b/arch/mips/gt64120/wrppmc/irq.c index 8d75a43ce877..eedfc24e1eae 100644 --- a/arch/mips/gt64120/wrppmc/irq.c +++ b/arch/mips/gt64120/wrppmc/irq.c | |||
@@ -30,18 +30,18 @@ | |||
30 | #include <asm/irq_cpu.h> | 30 | #include <asm/irq_cpu.h> |
31 | #include <asm/gt64120.h> | 31 | #include <asm/gt64120.h> |
32 | 32 | ||
33 | asmlinkage void plat_irq_dispatch(struct pt_regs *regs) | 33 | asmlinkage void plat_irq_dispatch(void) |
34 | { | 34 | { |
35 | unsigned int pending = read_c0_status() & read_c0_cause(); | 35 | unsigned int pending = read_c0_status() & read_c0_cause(); |
36 | 36 | ||
37 | if (pending & STATUSF_IP7) | 37 | if (pending & STATUSF_IP7) |
38 | do_IRQ(WRPPMC_MIPS_TIMER_IRQ, regs); /* CPU Compare/Count internal timer */ | 38 | do_IRQ(WRPPMC_MIPS_TIMER_IRQ); /* CPU Compare/Count internal timer */ |
39 | else if (pending & STATUSF_IP6) | 39 | else if (pending & STATUSF_IP6) |
40 | do_IRQ(WRPPMC_UART16550_IRQ, regs); /* UART 16550 port */ | 40 | do_IRQ(WRPPMC_UART16550_IRQ); /* UART 16550 port */ |
41 | else if (pending & STATUSF_IP3) | 41 | else if (pending & STATUSF_IP3) |
42 | do_IRQ(WRPPMC_PCI_INTA_IRQ, regs); /* PCI INT_A */ | 42 | do_IRQ(WRPPMC_PCI_INTA_IRQ); /* PCI INT_A */ |
43 | else | 43 | else |
44 | spurious_interrupt(regs); | 44 | spurious_interrupt(); |
45 | } | 45 | } |
46 | 46 | ||
47 | /** | 47 | /** |