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authorYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>2007-10-09 11:28:26 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-10-11 18:46:18 -0400
commit4b92fe2309c762d9ba9201a16f20d6d167e641b3 (patch)
tree465e4a45626b8bd023c9d335f94b55156093a210 /arch/mips/gt64120
parentdec8b1ca990055f3a8954ac3bc98fdb785af52e4 (diff)
[MIPS] cleanup WRPPMC include files
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/gt64120')
-rw-r--r--arch/mips/gt64120/wrppmc/irq.c23
-rw-r--r--arch/mips/gt64120/wrppmc/pci.c3
-rw-r--r--arch/mips/gt64120/wrppmc/reset.c10
-rw-r--r--arch/mips/gt64120/wrppmc/time.c11
4 files changed, 12 insertions, 35 deletions
diff --git a/arch/mips/gt64120/wrppmc/irq.c b/arch/mips/gt64120/wrppmc/irq.c
index 06177bf5b1d6..c6e706274db4 100644
--- a/arch/mips/gt64120/wrppmc/irq.c
+++ b/arch/mips/gt64120/wrppmc/irq.c
@@ -9,26 +9,13 @@
9 * Free Software Foundation; either version 2 of the License, or (at your 9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version. 10 * option) any later version.
11 */ 11 */
12#include <linux/errno.h> 12#include <linux/hardirq.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/kernel_stat.h> 14#include <linux/irq.h>
15#include <linux/module.h> 15
16#include <linux/signal.h>
17#include <linux/sched.h>
18#include <linux/types.h>
19#include <linux/interrupt.h>
20#include <linux/ioport.h>
21#include <linux/timex.h>
22#include <linux/slab.h>
23#include <linux/random.h>
24#include <linux/bitops.h>
25#include <asm/bootinfo.h>
26#include <asm/io.h>
27#include <asm/bitops.h>
28#include <asm/mipsregs.h>
29#include <asm/system.h>
30#include <asm/irq_cpu.h>
31#include <asm/gt64120.h> 16#include <asm/gt64120.h>
17#include <asm/irq_cpu.h>
18#include <asm/mipsregs.h>
32 19
33asmlinkage void plat_irq_dispatch(void) 20asmlinkage void plat_irq_dispatch(void)
34{ 21{
diff --git a/arch/mips/gt64120/wrppmc/pci.c b/arch/mips/gt64120/wrppmc/pci.c
index 0d5289bc1804..d06192faeb7c 100644
--- a/arch/mips/gt64120/wrppmc/pci.c
+++ b/arch/mips/gt64120/wrppmc/pci.c
@@ -8,9 +8,10 @@
8 * for more details. 8 * for more details.
9 */ 9 */
10#include <linux/init.h> 10#include <linux/init.h>
11#include <linux/ioport.h>
11#include <linux/types.h> 12#include <linux/types.h>
12#include <linux/pci.h> 13#include <linux/pci.h>
13#include <linux/kernel.h> 14
14#include <asm/gt64120.h> 15#include <asm/gt64120.h>
15 16
16extern struct pci_ops gt64xxx_pci0_ops; 17extern struct pci_ops gt64xxx_pci0_ops;
diff --git a/arch/mips/gt64120/wrppmc/reset.c b/arch/mips/gt64120/wrppmc/reset.c
index b97039c6d3db..c355cff38f6c 100644
--- a/arch/mips/gt64120/wrppmc/reset.c
+++ b/arch/mips/gt64120/wrppmc/reset.c
@@ -5,14 +5,10 @@
5 * 5 *
6 * Copyright (C) 1997 Ralf Baechle 6 * Copyright (C) 1997 Ralf Baechle
7 */ 7 */
8#include <linux/sched.h> 8#include <linux/kernel.h>
9#include <linux/mm.h> 9
10#include <asm/io.h>
11#include <asm/pgtable.h>
12#include <asm/processor.h>
13#include <asm/reboot.h>
14#include <asm/system.h>
15#include <asm/cacheflush.h> 10#include <asm/cacheflush.h>
11#include <asm/mipsregs.h>
16 12
17void wrppmc_machine_restart(char *command) 13void wrppmc_machine_restart(char *command)
18{ 14{
diff --git a/arch/mips/gt64120/wrppmc/time.c b/arch/mips/gt64120/wrppmc/time.c
index faf164e7e0df..b207e7f1417a 100644
--- a/arch/mips/gt64120/wrppmc/time.c
+++ b/arch/mips/gt64120/wrppmc/time.c
@@ -11,18 +11,11 @@
11 * Copyright (C) 2006, Wind River System Inc. 11 * Copyright (C) 2006, Wind River System Inc.
12 */ 12 */
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/string.h>
15#include <linux/kernel.h>
16#include <linux/param.h> /* for HZ */
17#include <linux/irq.h>
18#include <linux/timex.h>
19#include <linux/interrupt.h> 14#include <linux/interrupt.h>
15#include <linux/irq.h>
20 16
21#include <asm/reboot.h>
22#include <asm/time.h>
23#include <asm/io.h>
24#include <asm/bootinfo.h>
25#include <asm/gt64120.h> 17#include <asm/gt64120.h>
18#include <asm/time.h>
26 19
27#define WRPPMC_CPU_CLK_FREQ 40000000 /* 40MHZ */ 20#define WRPPMC_CPU_CLK_FREQ 40000000 /* 40MHZ */
28 21