aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/gt64120/ev64120
diff options
context:
space:
mode:
authorRalf Baechle <ralf@linux-mips.org>2006-04-03 12:56:36 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-04-18 22:14:21 -0400
commite4ac58afdfac792c0583af30dbd9eae53e24c78b (patch)
tree7517bef2c515fc630e4d3d238867b91cde96f558 /arch/mips/gt64120/ev64120
parentd35d473c25d43d7db3e5e18b66d558d2a631cca8 (diff)
[MIPS] Rewrite all the assembler interrupt handlers to C.
Saves like 1,600 lines of code, is way easier to debug, compilers frequently do a better job than the cut and paste type of handlers many boards had. And finally having all the stuff done in a single place also means alot of bug potencial for the MT ASE is gone. The only surviving handler in assembler is the DECstation one; I hope Maciej will rewrite it. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/gt64120/ev64120')
-rw-r--r--arch/mips/gt64120/ev64120/Makefile2
-rw-r--r--arch/mips/gt64120/ev64120/int-handler.S114
-rw-r--r--arch/mips/gt64120/ev64120/irq.c27
3 files changed, 16 insertions, 127 deletions
diff --git a/arch/mips/gt64120/ev64120/Makefile b/arch/mips/gt64120/ev64120/Makefile
index ebe91c57e173..b2c53a8f8718 100644
--- a/arch/mips/gt64120/ev64120/Makefile
+++ b/arch/mips/gt64120/ev64120/Makefile
@@ -6,6 +6,6 @@
6# Makefile for the Galileo EV64120 board. 6# Makefile for the Galileo EV64120 board.
7# 7#
8 8
9obj-y += int-handler.o irq.o promcon.o reset.o serialGT.o setup.o 9obj-y += irq.o promcon.o reset.o serialGT.o setup.o
10 10
11EXTRA_AFLAGS := $(CFLAGS) 11EXTRA_AFLAGS := $(CFLAGS)
diff --git a/arch/mips/gt64120/ev64120/int-handler.S b/arch/mips/gt64120/ev64120/int-handler.S
deleted file mode 100644
index 9dda5b449522..000000000000
--- a/arch/mips/gt64120/ev64120/int-handler.S
+++ /dev/null
@@ -1,114 +0,0 @@
1/*
2 * int-handler.S
3 *
4 * Based on the cobalt handler.
5 */
6#include <asm/asm.h>
7#include <asm/mipsregs.h>
8#include <asm/addrspace.h>
9#include <asm/regdef.h>
10#include <asm/stackframe.h>
11
12/*
13 * galileo_handle_int -
14 * We check for the timer first, then check PCI ints A and D.
15 * Then check for serial IRQ and fall through.
16 */
17 .align 5
18 .set reorder
19 .set noat
20 NESTED(galileo_handle_int, PT_SIZE, sp)
21 SAVE_ALL
22 CLI
23 .set at
24 mfc0 t0,CP0_CAUSE
25 mfc0 t2,CP0_STATUS
26
27 and t0,t2
28
29 andi t1,t0,STATUSF_IP4 /* int2 hardware line (timer) */
30 bnez t1,ll_gt64120_irq
31 andi t1,t0,STATUSF_IP2 /* int0 hardware line */
32 bnez t1,ll_pci_intA
33 andi t1,t0,STATUSF_IP5 /* int3 hardware line */
34 bnez t1,ll_pci_intD
35 andi t1,t0,STATUSF_IP6 /* int4 hardware line */
36 bnez t1,ll_serial_irq
37 andi t1,t0,STATUSF_IP7 /* compare int */
38 bnez t1,ll_compare_irq
39 nop
40
41 /* wrong alarm or masked ... */
42 jal spurious_interrupt
43 nop
44 j ret_from_irq
45 END(galileo_handle_int)
46
47
48 .align 5
49 .set reorder
50ll_gt64120_irq:
51 li a0,4
52 move a1,sp
53 jal do_IRQ
54 nop
55 j ret_from_irq
56 nop
57
58 .align 5
59 .set reorder
60ll_compare_irq:
61 li a0,7
62 move a1,sp
63 jal do_IRQ
64 nop
65 j ret_from_irq
66 nop
67
68 .align 5
69 .set reorder
70ll_pci_intA:
71 move a0,sp
72 jal pci_intA
73 nop
74 j ret_from_irq
75 nop
76
77#if 0
78 .align 5
79 .set reorder
80ll_pci_intB:
81 move a0,sp
82 jal pci_intB
83 nop
84 j ret_from_irq
85 nop
86
87 .align 5
88 .set reorder
89ll_pci_intC:
90 move a0,sp
91 jal pci_intC
92 nop
93 j ret_from_irq
94 nop
95#endif
96
97 .align 5
98 .set reorder
99ll_pci_intD:
100 move a0,sp
101 jal pci_intD
102 nop
103 j ret_from_irq
104 nop
105
106 .align 5
107 .set reorder
108ll_serial_irq:
109 li a0,6
110 move a1,sp
111 jal do_IRQ
112 nop
113 j ret_from_irq
114 nop
diff --git a/arch/mips/gt64120/ev64120/irq.c b/arch/mips/gt64120/ev64120/irq.c
index 3b186159b21a..46c468b26b30 100644
--- a/arch/mips/gt64120/ev64120/irq.c
+++ b/arch/mips/gt64120/ev64120/irq.c
@@ -46,14 +46,22 @@
46#include <asm/system.h> 46#include <asm/system.h>
47#include <asm/gt64120.h> 47#include <asm/gt64120.h>
48 48
49asmlinkage inline void pci_intA(struct pt_regs *regs) 49asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
50{ 50{
51 do_IRQ(GT_INTA, regs); 51 unsigned int pending = read_c0_status() & read_c0_cause();
52} 52
53 53 if (pending & STATUSF_IP4) /* int2 hardware line (timer) */
54asmlinkage inline void pci_intD(struct pt_regs *regs) 54 do_IRQ(4, regs);
55{ 55 else if (pending & STATUSF_IP2) /* int0 hardware line */
56 do_IRQ(GT_INTD, regs); 56 do_IRQ(GT_INTA, regs);
57 else if (pending & STATUSF_IP5) /* int3 hardware line */
58 do_IRQ(GT_INTD, regs);
59 else if (pending & STATUSF_IP6) /* int4 hardware line */
60 do_IRQ(6, regs);
61 else if (pending & STATUSF_IP7) /* compare int */
62 do_IRQ(7, regs);
63 else
64 spurious_interrupt(regs);
57} 65}
58 66
59static void disable_ev64120_irq(unsigned int irq_nr) 67static void disable_ev64120_irq(unsigned int irq_nr)
@@ -109,16 +117,11 @@ static struct hw_interrupt_type ev64120_irq_type = {
109 117
110void gt64120_irq_setup(void) 118void gt64120_irq_setup(void)
111{ 119{
112 extern asmlinkage void galileo_handle_int(void);
113
114 /* 120 /*
115 * Clear all of the interrupts while we change the able around a bit. 121 * Clear all of the interrupts while we change the able around a bit.
116 */ 122 */
117 clear_c0_status(ST0_IM); 123 clear_c0_status(ST0_IM);
118 124
119 /* Sets the exception_handler array. */
120 set_except_vector(0, galileo_handle_int);
121
122 local_irq_disable(); 125 local_irq_disable();
123 126
124 /* 127 /*