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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/mips/gt64120/ev64120
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'arch/mips/gt64120/ev64120')
-rw-r--r--arch/mips/gt64120/ev64120/Makefile11
-rw-r--r--arch/mips/gt64120/ev64120/int-handler.S113
-rw-r--r--arch/mips/gt64120/ev64120/irq.c145
-rw-r--r--arch/mips/gt64120/ev64120/promcon.c53
-rw-r--r--arch/mips/gt64120/ev64120/reset.c45
-rw-r--r--arch/mips/gt64120/ev64120/serialGT.c212
-rw-r--r--arch/mips/gt64120/ev64120/setup.c103
7 files changed, 682 insertions, 0 deletions
diff --git a/arch/mips/gt64120/ev64120/Makefile b/arch/mips/gt64120/ev64120/Makefile
new file mode 100644
index 000000000000..ebe91c57e173
--- /dev/null
+++ b/arch/mips/gt64120/ev64120/Makefile
@@ -0,0 +1,11 @@
1#
2# Copyright 2000 RidgeRun, Inc.
3# Author: RidgeRun, Inc.
4# glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
5#
6# Makefile for the Galileo EV64120 board.
7#
8
9obj-y += int-handler.o irq.o promcon.o reset.o serialGT.o setup.o
10
11EXTRA_AFLAGS := $(CFLAGS)
diff --git a/arch/mips/gt64120/ev64120/int-handler.S b/arch/mips/gt64120/ev64120/int-handler.S
new file mode 100644
index 000000000000..752435faf2de
--- /dev/null
+++ b/arch/mips/gt64120/ev64120/int-handler.S
@@ -0,0 +1,113 @@
1/*
2 * int-handler.S
3 *
4 * Based on the cobalt handler.
5 */
6#include <asm/asm.h>
7#include <asm/mipsregs.h>
8#include <asm/addrspace.h>
9#include <asm/regdef.h>
10#include <asm/stackframe.h>
11
12/*
13 * galileo_handle_int -
14 * We check for the timer first, then check PCI ints A and D.
15 * Then check for serial IRQ and fall through.
16 */
17 .align 5
18 .set reorder
19 .set noat
20 NESTED(galileo_handle_int, PT_SIZE, sp)
21 SAVE_ALL
22 CLI
23 .set at
24 mfc0 t0,CP0_CAUSE
25 mfc0 t2,CP0_STATUS
26
27 and t0,t2
28
29 andi t1,t0,STATUSF_IP4 /* int2 hardware line (timer) */
30 bnez t1,ll_gt64120_irq
31 andi t1,t0,STATUSF_IP2 /* int0 hardware line */
32 bnez t1,ll_pci_intA
33 andi t1,t0,STATUSF_IP5 /* int3 hardware line */
34 bnez t1,ll_pci_intD
35 andi t1,t0,STATUSF_IP6 /* int4 hardware line */
36 bnez t1,ll_serial_irq
37 andi t1,t0,STATUSF_IP7 /* compare int */
38 bnez t1,ll_compare_irq
39 nop
40
41 /* wrong alarm or masked ... */
42 j spurious_interrupt
43 nop
44 END(galileo_handle_int)
45
46
47 .align 5
48 .set reorder
49ll_gt64120_irq:
50 li a0,4
51 move a1,sp
52 jal do_IRQ
53 nop
54 j ret_from_irq
55 nop
56
57 .align 5
58 .set reorder
59ll_compare_irq:
60 li a0,7
61 move a1,sp
62 jal do_IRQ
63 nop
64 j ret_from_irq
65 nop
66
67 .align 5
68 .set reorder
69ll_pci_intA:
70 move a0,sp
71 jal pci_intA
72 nop
73 j ret_from_irq
74 nop
75
76#if 0
77 .align 5
78 .set reorder
79ll_pci_intB:
80 move a0,sp
81 jal pci_intB
82 nop
83 j ret_from_irq
84 nop
85
86 .align 5
87 .set reorder
88ll_pci_intC:
89 move a0,sp
90 jal pci_intC
91 nop
92 j ret_from_irq
93 nop
94#endif
95
96 .align 5
97 .set reorder
98ll_pci_intD:
99 move a0,sp
100 jal pci_intD
101 nop
102 j ret_from_irq
103 nop
104
105 .align 5
106 .set reorder
107ll_serial_irq:
108 li a0,6
109 move a1,sp
110 jal do_IRQ
111 nop
112 j ret_from_irq
113 nop
diff --git a/arch/mips/gt64120/ev64120/irq.c b/arch/mips/gt64120/ev64120/irq.c
new file mode 100644
index 000000000000..3b186159b21a
--- /dev/null
+++ b/arch/mips/gt64120/ev64120/irq.c
@@ -0,0 +1,145 @@
1/*
2 * BRIEF MODULE DESCRIPTION
3 * Code to handle irqs on GT64120A boards
4 * Derived from mips/orion and Cort <cort@fsmlabs.com>
5 *
6 * Copyright (C) 2000 RidgeRun, Inc.
7 * Author: RidgeRun, Inc.
8 * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
21 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * You should have received a copy of the GNU General Public License along
27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */
30#include <linux/errno.h>
31#include <linux/init.h>
32#include <linux/kernel_stat.h>
33#include <linux/module.h>
34#include <linux/signal.h>
35#include <linux/sched.h>
36#include <linux/types.h>
37#include <linux/interrupt.h>
38#include <linux/ioport.h>
39#include <linux/timex.h>
40#include <linux/slab.h>
41#include <linux/random.h>
42#include <linux/bitops.h>
43#include <asm/bootinfo.h>
44#include <asm/io.h>
45#include <asm/mipsregs.h>
46#include <asm/system.h>
47#include <asm/gt64120.h>
48
49asmlinkage inline void pci_intA(struct pt_regs *regs)
50{
51 do_IRQ(GT_INTA, regs);
52}
53
54asmlinkage inline void pci_intD(struct pt_regs *regs)
55{
56 do_IRQ(GT_INTD, regs);
57}
58
59static void disable_ev64120_irq(unsigned int irq_nr)
60{
61 unsigned long flags;
62
63 local_irq_save(flags);
64 if (irq_nr >= 8) { // All PCI interrupts are on line 5 or 2
65 clear_c0_status(9 << 10);
66 } else {
67 clear_c0_status(1 << (irq_nr + 8));
68 }
69 local_irq_restore(flags);
70}
71
72static void enable_ev64120_irq(unsigned int irq_nr)
73{
74 unsigned long flags;
75
76 local_irq_save(flags);
77 if (irq_nr >= 8) // All PCI interrupts are on line 5 or 2
78 set_c0_status(9 << 10);
79 else
80 set_c0_status(1 << (irq_nr + 8));
81 local_irq_restore(flags);
82}
83
84static unsigned int startup_ev64120_irq(unsigned int irq)
85{
86 enable_ev64120_irq(irq);
87 return 0; /* Never anything pending */
88}
89
90#define shutdown_ev64120_irq disable_ev64120_irq
91#define mask_and_ack_ev64120_irq disable_ev64120_irq
92
93static void end_ev64120_irq(unsigned int irq)
94{
95 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
96 enable_ev64120_irq(irq);
97}
98
99static struct hw_interrupt_type ev64120_irq_type = {
100 .typename = "EV64120",
101 .startup = startup_ev64120_irq,
102 .shutdown = shutdown_ev64120_irq,
103 .enable = enable_ev64120_irq,
104 .disable = disable_ev64120_irq,
105 .ack = mask_and_ack_ev64120_irq,
106 .end = end_ev64120_irq,
107 .set_affinity = NULL
108};
109
110void gt64120_irq_setup(void)
111{
112 extern asmlinkage void galileo_handle_int(void);
113
114 /*
115 * Clear all of the interrupts while we change the able around a bit.
116 */
117 clear_c0_status(ST0_IM);
118
119 /* Sets the exception_handler array. */
120 set_except_vector(0, galileo_handle_int);
121
122 local_irq_disable();
123
124 /*
125 * Enable timer. Other interrupts will be enabled as they are
126 * registered.
127 */
128 set_c0_status(IE_IRQ2);
129}
130
131void __init arch_init_irq(void)
132{
133 int i;
134
135 /* Let's initialize our IRQ descriptors */
136 for (i = 0; i < NR_IRQS; i++) {
137 irq_desc[i].status = 0;
138 irq_desc[i].handler = &no_irq_type;
139 irq_desc[i].action = NULL;
140 irq_desc[i].depth = 0;
141 spin_lock_init(&irq_desc[i].lock);
142 }
143
144 gt64120_irq_setup();
145}
diff --git a/arch/mips/gt64120/ev64120/promcon.c b/arch/mips/gt64120/ev64120/promcon.c
new file mode 100644
index 000000000000..b5937c4ba7db
--- /dev/null
+++ b/arch/mips/gt64120/ev64120/promcon.c
@@ -0,0 +1,53 @@
1/*
2 * Wrap-around code for a console using the
3 * SGI PROM io-routines.
4 *
5 * Copyright (c) 1999 Ulf Carlsson
6 *
7 * Derived from DECstation promcon.c
8 * Copyright (c) 1998 Harald Koerfgen
9 */
10#include <linux/tty.h>
11#include <linux/init.h>
12#include <linux/console.h>
13
14static void prom_console_write(struct console *co, const char *s,
15 unsigned count)
16{
17 extern int CONSOLE_CHANNEL; // The default serial port
18 unsigned i;
19
20 for (i = 0; i < count; i++) {
21 if (*s == 10)
22 serial_putc(CONSOLE_CHANNEL, 13);
23 serial_putc(CONSOLE_CHANNEL, *s++);
24 }
25}
26
27int prom_getchar(void)
28{
29 return 0;
30}
31
32static struct console sercons = {
33 .name = "ttyS",
34 .write = prom_console_write,
35 .flags = CON_PRINTBUFFER,
36 .index = -1,
37};
38
39/*
40 * Register console.
41 */
42
43static int gal_serial_console_init(void)
44{
45 // serial_init();
46 //serial_set(115200);
47
48 register_console(&sercons);
49
50 return 0;
51}
52
53console_initcall(gal_serial_console_init);
diff --git a/arch/mips/gt64120/ev64120/reset.c b/arch/mips/gt64120/ev64120/reset.c
new file mode 100644
index 000000000000..7b9f5e5bf21f
--- /dev/null
+++ b/arch/mips/gt64120/ev64120/reset.c
@@ -0,0 +1,45 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1997 Ralf Baechle
7 */
8#include <linux/sched.h>
9#include <linux/mm.h>
10#include <asm/io.h>
11#include <asm/pgtable.h>
12#include <asm/processor.h>
13#include <asm/reboot.h>
14#include <asm/system.h>
15
16void galileo_machine_restart(char *command)
17{
18 *(volatile char *) 0xbc000000 = 0x0f;
19 /*
20 * Ouch, we're still alive ... This time we take the silver bullet ...
21 * ... and find that we leave the hardware in a state in which the
22 * kernel in the flush locks up somewhen during of after the PCI
23 * detection stuff.
24 */
25 set_c0_status(ST0_BEV | ST0_ERL);
26 change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
27 flush_cache_all();
28 write_c0_wired(0);
29 __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
30}
31
32void galileo_machine_halt(void)
33{
34 printk(KERN_NOTICE "You can safely turn off the power\n");
35 while (1)
36 __asm__(".set\tmips3\n\t"
37 "wait\n\t"
38 ".set\tmips0");
39
40}
41
42void galileo_machine_power_off(void)
43{
44 galileo_machine_halt();
45}
diff --git a/arch/mips/gt64120/ev64120/serialGT.c b/arch/mips/gt64120/ev64120/serialGT.c
new file mode 100644
index 000000000000..16e34a546e54
--- /dev/null
+++ b/arch/mips/gt64120/ev64120/serialGT.c
@@ -0,0 +1,212 @@
1/*
2 * serialGT.c
3 *
4 * BRIEF MODULE DESCRIPTION
5 * Low Level Serial Port control for use
6 * with the Galileo EVB64120A MIPS eval board and
7 * its on board two channel 16552 Uart.
8 *
9 * Copyright (C) 2000 RidgeRun, Inc.
10 * Author: RidgeRun, Inc.
11 * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
17 *
18 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
19 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
21 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
24 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
25 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * You should have received a copy of the GNU General Public License along
30 * with this program; if not, write to the Free Software Foundation, Inc.,
31 * 675 Mass Ave, Cambridge, MA 02139, USA.
32 *
33 */
34
35// Note:
36// Serial CHANNELS - 0 is the bottom connector of evb64120A.
37// (The one that maps to the "B" channel of the
38// board's uart)
39// 1 is the top connector of evb64120A.
40// (The one that maps to the "A" channel of the
41// board's uart)
42int DEBUG_CHANNEL = 0; // See Note Above
43int CONSOLE_CHANNEL = 1; // See Note Above
44
45#define DUART 0xBD000000 /* Base address of Uart. */
46#define CHANNELOFFSET 0x20 /* DUART+CHANNELOFFSET gets you to the ChanA
47 register set of the 16552 Uart device.
48 DUART+0 gets you to the ChanB register set.
49 */
50#define DUART_DELTA 0x4
51#define FIFO_ENABLE 0x07
52#define INT_ENABLE 0x04 /* default interrupt mask */
53
54#define RBR 0x00
55#define THR 0x00
56#define DLL 0x00
57#define IER 0x01
58#define DLM 0x01
59#define IIR 0x02
60#define FCR 0x02
61#define LCR 0x03
62#define MCR 0x04
63#define LSR 0x05
64#define MSR 0x06
65#define SCR 0x07
66
67#define LCR_DLAB 0x80
68#define XTAL 1843200
69#define LSR_THRE 0x20
70#define LSR_BI 0x10
71#define LSR_DR 0x01
72#define MCR_LOOP 0x10
73#define ACCESS_DELAY 0x10000
74
75/******************************
76 Routine:
77 Description:
78 ******************************/
79int inreg(int channel, int reg)
80{
81 int val;
82 val =
83 *((volatile unsigned char *) DUART +
84 (channel * CHANNELOFFSET) + (reg * DUART_DELTA));
85 return val;
86}
87
88/******************************
89 Routine:
90 Description:
91 ******************************/
92void outreg(int channel, int reg, unsigned char val)
93{
94 *((volatile unsigned char *) DUART + (channel * CHANNELOFFSET)
95 + (reg * DUART_DELTA)) = val;
96}
97
98/******************************
99 Routine:
100 Description:
101 Initialize the device driver.
102 ******************************/
103void serial_init(int channel)
104{
105 /*
106 * Configure active port, (CHANNELOFFSET already set.)
107 *
108 * Set 8 bits, 1 stop bit, no parity.
109 *
110 * LCR<7> 0 divisor latch access bit
111 * LCR<6> 0 break control (1=send break)
112 * LCR<5> 0 stick parity (0=space, 1=mark)
113 * LCR<4> 0 parity even (0=odd, 1=even)
114 * LCR<3> 0 parity enable (1=enabled)
115 * LCR<2> 0 # stop bits (0=1, 1=1.5)
116 * LCR<1:0> 11 bits per character(00=5, 01=6, 10=7, 11=8)
117 */
118 outreg(channel, LCR, 0x3);
119
120 outreg(channel, FCR, FIFO_ENABLE); /* Enable the FIFO */
121
122 outreg(channel, IER, INT_ENABLE); /* Enable appropriate interrupts */
123}
124
125/******************************
126 Routine:
127 Description:
128 Set the baud rate.
129 ******************************/
130void serial_set(int channel, unsigned long baud)
131{
132 unsigned char sav_lcr;
133
134 /*
135 * Enable access to the divisor latches by setting DLAB in LCR.
136 *
137 */
138 sav_lcr = inreg(channel, LCR);
139
140#if 0
141 /*
142 * Set baud rate
143 */
144 outreg(channel, LCR, LCR_DLAB | sav_lcr);
145 // outreg(DLL,(XTAL/(16*2*(baud))-2));
146 outreg(channel, DLL, XTAL / (16 * baud));
147 // outreg(DLM,(XTAL/(16*2*(baud))-2)>>8);
148 outreg(channel, DLM, (XTAL / (16 * baud)) >> 8);
149#else
150 /*
151 * Note: Set baud rate, hardcoded here for rate of 115200
152 * since became unsure of above "buad rate" algorithm (??).
153 */
154 outreg(channel, LCR, 0x83);
155 outreg(channel, DLM, 0x00); // See note above
156 outreg(channel, DLL, 0x02); // See note above.
157 outreg(channel, LCR, 0x03);
158#endif
159
160 /*
161 * Restore line control register
162 */
163 outreg(channel, LCR, sav_lcr);
164}
165
166
167/******************************
168 Routine:
169 Description:
170 Transmit a character.
171 ******************************/
172void serial_putc(int channel, int c)
173{
174 while ((inreg(channel, LSR) & LSR_THRE) == 0);
175 outreg(channel, THR, c);
176}
177
178/******************************
179 Routine:
180 Description:
181 Read a received character if one is
182 available. Return -1 otherwise.
183 ******************************/
184int serial_getc(int channel)
185{
186 if (inreg(channel, LSR) & LSR_DR) {
187 return inreg(channel, RBR);
188 }
189 return -1;
190}
191
192/******************************
193 Routine:
194 Description:
195 Used by embedded gdb client. (example; gdb-stub.c)
196 ******************************/
197char getDebugChar()
198{
199 int val;
200 while ((val = serial_getc(DEBUG_CHANNEL)) == -1); // loop until we get a character in.
201 return (char) val;
202}
203
204/******************************
205 Routine:
206 Description:
207 Used by embedded gdb target. (example; gdb-stub.c)
208 ******************************/
209void putDebugChar(char c)
210{
211 serial_putc(DEBUG_CHANNEL, (int) c);
212}
diff --git a/arch/mips/gt64120/ev64120/setup.c b/arch/mips/gt64120/ev64120/setup.c
new file mode 100644
index 000000000000..dba0961400cc
--- /dev/null
+++ b/arch/mips/gt64120/ev64120/setup.c
@@ -0,0 +1,103 @@
1/*
2 * Copyright (C) 2000 RidgeRun, Inc.
3 * Author: RidgeRun, Inc.
4 * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 */
27#include <linux/init.h>
28#include <linux/kernel.h>
29#include <linux/types.h>
30#include <linux/mm.h>
31#include <linux/swap.h>
32#include <linux/ioport.h>
33#include <linux/sched.h>
34#include <linux/interrupt.h>
35#include <linux/pci.h>
36#include <linux/timex.h>
37#include <asm/bootinfo.h>
38#include <asm/page.h>
39#include <asm/io.h>
40#include <asm/irq.h>
41#include <asm/pci.h>
42#include <asm/processor.h>
43#include <asm/ptrace.h>
44#include <asm/time.h>
45#include <asm/reboot.h>
46#include <asm/traps.h>
47#include <linux/bootmem.h>
48
49unsigned long gt64120_base = KSEG1ADDR(0x14000000);
50
51/* These functions are used for rebooting or halting the machine*/
52extern void galileo_machine_restart(char *command);
53extern void galileo_machine_halt(void);
54extern void galileo_machine_power_off(void);
55/*
56 *This structure holds pointers to the pci configuration space accesses
57 *and interrupts allocating routine for device over the PCI
58 */
59extern struct pci_ops galileo_pci_ops;
60
61unsigned long __init prom_free_prom_memory(void)
62{
63 return 0;
64}
65
66/*
67 * Initializes basic routines and structures pointers, memory size (as
68 * given by the bios and saves the command line.
69 */
70extern void gt64120_time_init(void);
71
72static void __init ev64120_setup(void)
73{
74 _machine_restart = galileo_machine_restart;
75 _machine_halt = galileo_machine_halt;
76 _machine_power_off = galileo_machine_power_off;
77
78 board_time_init = gt64120_time_init;
79 set_io_port_base(KSEG1);
80}
81
82early_initcall(ev64120_setup);
83
84const char *get_system_type(void)
85{
86 return "Galileo EV64120A";
87}
88
89/*
90 * Kernel arguments passed by the firmware
91 *
92 * $a0 - nothing
93 * $a1 - holds a pointer to the eprom parameters
94 * $a2 - nothing
95 */
96
97void __init prom_init(void)
98{
99 mips_machgroup = MACH_GROUP_GALILEO;
100 mips_machtype = MACH_EV64120A;
101
102 add_memory_region(0, 32 << 20, BOOT_MEM_RAM);
103}
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-04 08:25:59 -0500