Linux-2.6.12-rc2v2.6.12-rc2

Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!

8 files changed, 740 insertions, 0 deletions

diff --git a/arch/mips/galileo-boards/ev96100/Makefile b/arch/mips/galileo-boards/ev96100/Makefile
new file mode 100644
index 000000000000..58c02f9db69d
--- /dev/null
+++ b/arch/mips/galileo-boards/ev96100/Makefile
@@ -0,0 +1,9 @@
+#
+#  Copyright 2000 MontaVista Software Inc.
+#  Author: MontaVista Software, Inc.
+#       ppopov@mvista.com or source@mvista.com
+#
+# Makefile for the Galileo EV96100 board.
+#
+
+obj-y           += init.o irq.o puts.o reset.o time.o int-handler.o setup.o
diff --git a/arch/mips/galileo-boards/ev96100/init.c b/arch/mips/galileo-boards/ev96100/init.c
new file mode 100644
index 000000000000..a01fe9b36f2c
--- /dev/null
+++ b/arch/mips/galileo-boards/ev96100/init.c
@@ -0,0 +1,173 @@
+/*
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ *              ppopov@mvista.com or source@mvista.com
+ *
+ * This file was derived from Carsten Langgaard's
+ * arch/mips/mips-boards/generic/generic.c
+ *
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/bootmem.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+
+#include <asm/addrspace.h>
+#include <asm/bootinfo.h>
+#include <asm/gt64120.h>
+
+
+/* Environment variable */
+
+typedef struct {
+        char *name;
+        char *val;
+} t_env_var;
+
+int prom_argc;
+char **prom_argv, **prom_envp;
+
+int init_debug = 0;
+
+char * __init prom_getcmdline(void)
+{
+        return &(arcs_cmdline[0]);
+}
+
+unsigned long __init prom_free_prom_memory(void)
+{
+        return 0;
+}
+
+void  __init prom_init_cmdline(void)
+{
+        char *cp;
+        int actr;
+
+        actr = 1; /* Always ignore argv[0] */
+
+        cp = &(arcs_cmdline[0]);
+        while(actr < prom_argc) {
+                strcpy(cp, prom_argv[actr]);
+                cp += strlen(prom_argv[actr]);
+                *cp++ = ' ';
+                actr++;
+        }
+        if (cp != &(arcs_cmdline[0])) /* get rid of trailing space */
+                --cp;
+        *cp = '\0';
+}
+
+char *prom_getenv(char *envname)
+{
+        /*
+         * Return a pointer to the given environment variable.
+         */
+
+        t_env_var *env = (t_env_var *) prom_envp;
+        int i;
+
+        i = strlen(envname);
+
+        while (env->name) {
+                if (strncmp(envname, env->name, i) == 0) {
+                        return (env->val);
+                }
+                env++;
+        }
+        return (NULL);
+}
+
+static inline unsigned char str2hexnum(unsigned char c)
+{
+        if (c >= '0' && c <= '9')
+                return c - '0';
+        if (c >= 'a' && c <= 'f')
+                return c - 'a' + 10;
+        return 0;               /* foo */
+}
+
+static inline void str2eaddr(unsigned char *ea, unsigned char *str)
+{
+        int i;
+
+        for (i = 0; i < 6; i++) {
+                unsigned char num;
+
+                if ((*str == '.') || (*str == ':'))
+                        str++;
+                num = str2hexnum(*str++) << 4;
+                num |= (str2hexnum(*str++));
+                ea[i] = num;
+        }
+}
+
+int get_ethernet_addr(char *ethernet_addr)
+{
+        char *ethaddr_str;
+
+        ethaddr_str = prom_getenv("ethaddr");
+        if (!ethaddr_str) {
+                printk("ethaddr not set in boot prom\n");
+                return -1;
+        }
+        str2eaddr(ethernet_addr, ethaddr_str);
+
+        if (init_debug > 1) {
+                int i;
+                printk("get_ethernet_addr: ");
+                for (i = 0; i < 5; i++)
+                        printk("%02x:",
+                               (unsigned char) *(ethernet_addr + i));
+                printk("%02x\n", *(ethernet_addr + i));
+        }
+
+        return 0;
+}
+
+const char *get_system_type(void)
+{
+        return "Galileo EV96100";
+}
+
+void __init prom_init(void)
+{
+        volatile unsigned char *uart;
+        char ppbuf[8];
+
+        prom_argc = fw_arg0;
+        prom_argv = (char **) fw_arg1;
+        prom_envp = (char **) fw_arg2;
+
+        mips_machgroup = MACH_GROUP_GALILEO;
+        mips_machtype = MACH_EV96100;
+
+        prom_init_cmdline();
+
+        /* 32 MB upgradable */
+        add_memory_region(0, 32 << 20, BOOT_MEM_RAM);
+}
diff --git a/arch/mips/galileo-boards/ev96100/int-handler.S b/arch/mips/galileo-boards/ev96100/int-handler.S
new file mode 100644
index 000000000000..ff4d10a38859
--- /dev/null
+++ b/arch/mips/galileo-boards/ev96100/int-handler.S
@@ -0,0 +1,33 @@
+#include <asm/asm.h>
+#include <asm/mipsregs.h>
+#include <asm/regdef.h>
+#include <asm/stackframe.h>
+
+        .set    noat
+        .align  5
+
+NESTED(ev96100IRQ, PT_SIZE, sp)
+        SAVE_ALL
+        CLI                             # Important: mark KERNEL mode !
+
+        mfc0    t0, CP0_CAUSE           # get pending interrupts
+        mfc0    t1, CP0_STATUS          # get enabled interrupts
+        and     t0, t1                  # isolate allowed ones
+
+        # FIX ME add R7000 extensions
+        andi    t0,0xff00               # isolate pending bits
+        andi    a0, t0, CAUSEF_IP7
+        beq     a0, zero, 1f
+        move    a0, sp
+        jal     mips_timer_interrupt
+        j       ret_from_irq
+
+1:      beqz    t0, 3f                  # spurious interrupt
+
+        move    a0, t0
+        move    a1, sp
+        jal     ev96100_cpu_irq
+        j       ret_from_irq
+
+3:      j       spurious_interrupt
+        END(ev96100IRQ)
diff --git a/arch/mips/galileo-boards/ev96100/irq.c b/arch/mips/galileo-boards/ev96100/irq.c
new file mode 100644
index 000000000000..97bf094da4fe
--- /dev/null
+++ b/arch/mips/galileo-boards/ev96100/irq.c
@@ -0,0 +1,66 @@
+/*
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ *              ppopov@mvista.com or source@mvista.com
+ *
+ * This file was derived from Carsten Langgaard's
+ * arch/mips/mips-boards/atlas/atlas_int.c.
+ *
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/kernel_stat.h>
+#include <linux/irq.h>
+#include <linux/module.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <asm/irq_cpu.h>
+
+extern asmlinkage void ev96100IRQ(void);
+
+static inline unsigned int ffz8(unsigned int word)
+{
+        unsigned long k;
+
+        k = 7;
+        if (word & 0x0fUL) { k -= 4;  word <<= 4;  }
+        if (word & 0x30UL) { k -= 2;  word <<= 2;  }
+        if (word & 0x40UL) { k -= 1; }
+
+        return k;
+}
+
+asmlinkage void ev96100_cpu_irq(unsigned int pendin)
+{
+        do_IRQ(ffz8(pending >> 8), regs);
+}
+
+void __init arch_init_irq(void)
+{
+        set_except_vector(0, ev96100IRQ);
+        mips_cpu_irq_init(0);
+}
diff --git a/arch/mips/galileo-boards/ev96100/puts.c b/arch/mips/galileo-boards/ev96100/puts.c
new file mode 100644
index 000000000000..49dc6d137b9c
--- /dev/null
+++ b/arch/mips/galileo-boards/ev96100/puts.c
@@ -0,0 +1,138 @@
+
+/*
+ * Debug routines which directly access the uart.
+ */
+
+#include <linux/types.h>
+#include <asm/gt64120.h>
+
+
+//#define SERIAL_BASE    EV96100_UART0_REGS_BASE
+#define SERIAL_BASE    0xBD000020
+#define NS16550_BASE   SERIAL_BASE
+
+#define SERA_CMD       0x0D
+#define SERA_DATA      0x08
+//#define SERB_CMD       0x05
+#define SERB_CMD       20
+#define SERB_DATA      0x00
+#define TX_BUSY        0x20
+
+#define TIMEOUT    0xffff
+#undef SLOW_DOWN
+
+static const char digits[16] = "0123456789abcdef";
+static volatile unsigned char *const com1 = (unsigned char *) SERIAL_BASE;
+
+
+#ifdef SLOW_DOWN
+static inline void slow_down()
+{
+        int k;
+        for (k = 0; k < 10000; k++);
+}
+#else
+#define slow_down()
+#endif
+
+void putch(const unsigned char c)
+{
+        unsigned char ch;
+        int i = 0;
+
+        do {
+                ch = com1[SERB_CMD];
+                slow_down();
+                i++;
+                if (i > TIMEOUT) {
+                        break;
+                }
+        } while (0 == (ch & TX_BUSY));
+        com1[SERB_DATA] = c;
+}
+
+void putchar(const unsigned char c)
+{
+        unsigned char ch;
+        int i = 0;
+
+        do {
+                ch = com1[SERB_CMD];
+                slow_down();
+                i++;
+                if (i > TIMEOUT) {
+                        break;
+                }
+        } while (0 == (ch & TX_BUSY));
+        com1[SERB_DATA] = c;
+}
+
+void puts(unsigned char *cp)
+{
+        unsigned char ch;
+        int i = 0;
+
+        while (*cp) {
+                do {
+                        ch = com1[SERB_CMD];
+                        slow_down();
+                        i++;
+                        if (i > TIMEOUT) {
+                                break;
+                        }
+                } while (0 == (ch & TX_BUSY));
+                com1[SERB_DATA] = *cp++;
+        }
+        putch('\r');
+        putch('\n');
+}
+
+void fputs(unsigned char *cp)
+{
+        unsigned char ch;
+        int i = 0;
+
+        while (*cp) {
+
+                do {
+                        ch = com1[SERB_CMD];
+                        slow_down();
+                        i++;
+                        if (i > TIMEOUT) {
+                                break;
+                        }
+                } while (0 == (ch & TX_BUSY));
+                com1[SERB_DATA] = *cp++;
+        }
+}
+
+
+void put64(uint64_t ul)
+{
+        int cnt;
+        unsigned ch;
+
+        cnt = 16;               /* 16 nibbles in a 64 bit long */
+        putch('0');
+        putch('x');
+        do {
+                cnt--;
+                ch = (unsigned char) (ul >> cnt * 4) & 0x0F;
+                putch(digits[ch]);
+        } while (cnt > 0);
+}
+
+void put32(unsigned u)
+{
+        int cnt;
+        unsigned ch;
+
+        cnt = 8;                /* 8 nibbles in a 32 bit long */
+        putch('0');
+        putch('x');
+        do {
+                cnt--;
+                ch = (unsigned char) (u >> cnt * 4) & 0x0F;
+                putch(digits[ch]);
+        } while (cnt > 0);
+}
diff --git a/arch/mips/galileo-boards/ev96100/reset.c b/arch/mips/galileo-boards/ev96100/reset.c
new file mode 100644
index 000000000000..5ef9b7f896e6
--- /dev/null
+++ b/arch/mips/galileo-boards/ev96100/reset.c
@@ -0,0 +1,70 @@
+/*
+ * BRIEF MODULE DESCRIPTION
+ *      Galileo EV96100 reset routines.
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ *              ppopov@mvista.com or source@mvista.com
+ *
+ * This file was derived from Carsten Langgaard's
+ * arch/mips/mips-boards/generic/reset.c
+ *
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <asm/io.h>
+#include <asm/pgtable.h>
+#include <asm/processor.h>
+#include <asm/reboot.h>
+#include <asm/system.h>
+#include <asm/gt64120.h>
+
+static void mips_machine_restart(char *command);
+static void mips_machine_halt(void);
+
+static void mips_machine_restart(char *command)
+{
+        set_c0_status(ST0_BEV | ST0_ERL);
+        change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
+        flush_cache_all();
+        write_c0_wired(0);
+        __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
+        while (1);
+}
+
+static void mips_machine_halt(void)
+{
+        printk(KERN_NOTICE "You can safely turn off the power\n");
+        while (1)
+                __asm__(".set\tmips3\n\t"
+                        "wait\n\t"
+                        ".set\tmips0");
+}
+
+void mips_reboot_setup(void)
+{
+        _machine_restart = mips_machine_restart;
+        _machine_halt = mips_machine_halt;
+}
diff --git a/arch/mips/galileo-boards/ev96100/setup.c b/arch/mips/galileo-boards/ev96100/setup.c
new file mode 100644
index 000000000000..28bd908c6d55
--- /dev/null
+++ b/arch/mips/galileo-boards/ev96100/setup.c
@@ -0,0 +1,162 @@
+/*
+ * BRIEF MODULE DESCRIPTION
+ *      Galileo EV96100 setup.
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ *              ppopov@mvista.com or source@mvista.com
+ *
+ * This file was derived from Carsten Langgaard's
+ * arch/mips/mips-boards/atlas/atlas_setup.c.
+ *
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/ioport.h>
+#include <linux/string.h>
+#include <linux/ctype.h>
+#include <linux/pci.h>
+
+#include <asm/cpu.h>
+#include <asm/bootinfo.h>
+#include <asm/mipsregs.h>
+#include <asm/irq.h>
+#include <asm/delay.h>
+#include <asm/gt64120.h>
+#include <asm/galileo-boards/ev96100int.h>
+
+
+extern char *__init prom_getcmdline(void);
+
+extern void mips_reboot_setup(void);
+
+unsigned char mac_0_1[12];
+
+static void __init ev96100_setup(void)
+{
+        unsigned int config = read_c0_config();
+        unsigned int status = read_c0_status();
+        unsigned int info = read_c0_info();
+        u32 tmp;
+
+        char *argptr;
+
+        clear_c0_status(ST0_FR);
+
+        if (config & 0x8)
+                printk("Secondary cache is enabled\n");
+        else
+                printk("Secondary cache is disabled\n");
+
+        if (status & (1 << 27))
+                printk("User-mode cache ops enabled\n");
+        else
+                printk("User-mode cache ops disabled\n");
+
+        printk("CP0 info reg: %x\n", (unsigned) info);
+        if (info & (1 << 28))
+                printk("burst mode Scache RAMS\n");
+        else
+                printk("pipelined Scache RAMS\n");
+
+        if (info & 0x1)
+                printk("Atomic Enable is set\n");
+
+        argptr = prom_getcmdline();
+#ifdef CONFIG_SERIAL_CONSOLE
+        if (strstr(argptr, "console=") == NULL) {
+                argptr = prom_getcmdline();
+                strcat(argptr, " console=ttyS0,115200");
+        }
+#endif
+
+        mips_reboot_setup();
+
+        set_io_port_base(KSEG1);
+        ioport_resource.start = GT_PCI_IO_BASE;
+        ioport_resource.end = GT_PCI_IO_BASE + 0x01ffffff;
+
+#ifdef CONFIG_BLK_DEV_INITRD
+        ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
+#endif
+
+
+        /*
+         * Setup GT controller master bit so we can do config cycles
+         */
+
+        /* Clear cause register bits */
+        GT_WRITE(GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT |
+                                     GT_INTRCAUSE_TARABORT0_BIT));
+        /* Setup address */
+        GT_WRITE(GT_PCI0_CFGADDR_OFS,
+                 (0 << GT_PCI0_CFGADDR_BUSNUM_SHF) |
+                 (0 << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
+                 ((PCI_COMMAND / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) |
+                 GT_PCI0_CFGADDR_CONFIGEN_BIT);
+
+        udelay(2);
+        tmp = GT_READ(GT_PCI0_CFGDATA_OFS);
+
+        tmp |= (PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
+                PCI_COMMAND_MASTER | PCI_COMMAND_SERR);
+        GT_WRITE(GT_PCI0_CFGADDR_OFS,
+                 (0 << GT_PCI0_CFGADDR_BUSNUM_SHF) |
+                 (0 << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
+                 ((PCI_COMMAND / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) |
+                 GT_PCI0_CFGADDR_CONFIGEN_BIT);
+        udelay(2);
+        GT_WRITE(GT_PCI0_CFGDATA_OFS, tmp);
+
+        /* Setup address */
+        GT_WRITE(GT_PCI0_CFGADDR_OFS,
+                 (0 << GT_PCI0_CFGADDR_BUSNUM_SHF) |
+                 (0 << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
+                 ((PCI_COMMAND / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) |
+                 GT_PCI0_CFGADDR_CONFIGEN_BIT);
+
+        udelay(2);
+        tmp = GT_READ(GT_PCI0_CFGDATA_OFS);
+}
+
+early_initcall(ev96100_setup);
+
+unsigned short get_gt_devid(void)
+{
+        u32 gt_devid;
+
+        /* Figure out if this is a gt96100 or gt96100A */
+        GT_WRITE(GT_PCI0_CFGADDR_OFS,
+                 (0 << GT_PCI0_CFGADDR_BUSNUM_SHF) |
+                 (0 << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
+                 ((PCI_VENDOR_ID / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) |
+                 GT_PCI0_CFGADDR_CONFIGEN_BIT);
+
+        udelay(4);
+        gt_devid = GT_READ(GT_PCI0_CFGDATA_OFS);
+
+        return gt_devid >> 16;
+}
diff --git a/arch/mips/galileo-boards/ev96100/time.c b/arch/mips/galileo-boards/ev96100/time.c
new file mode 100644
index 000000000000..bff5b1c174e4
--- /dev/null
+++ b/arch/mips/galileo-boards/ev96100/time.c
@@ -0,0 +1,89 @@
+/*
+ * BRIEF MODULE DESCRIPTION
+ *      Galileo EV96100 rtc routines.
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ *              ppopov@mvista.com or source@mvista.com
+ *
+ * This file was derived from Carsten Langgaard's
+ * arch/mips/mips-boards/atlas/atlas_rtc.c.
+ *
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/kernel_stat.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/spinlock.h>
+#include <linux/timex.h>
+
+#include <asm/mipsregs.h>
+#include <asm/ptrace.h>
+#include <asm/time.h>
+
+
+#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
+
+extern volatile unsigned long wall_jiffies;
+unsigned long missed_heart_beats = 0;
+
+static unsigned long r4k_offset; /* Amount to increment compare reg each time */
+static unsigned long r4k_cur;    /* What counter should be at next timer irq */
+
+static inline void ack_r4ktimer(unsigned long newval)
+{
+        write_c0_compare(newval);
+}
+
+/*
+ * There are a lot of conceptually broken versions of the MIPS timer interrupt
+ * handler floating around.  This one is rather different, but the algorithm
+ * is probably more robust.
+ */
+void mips_timer_interrupt(struct pt_regs *regs)
+{
+        int irq = 7; /* FIX ME */
+
+        if (r4k_offset == 0) {
+            goto null;
+        }
+
+        do {
+                kstat_this_cpu.irqs[irq]++;
+                do_timer(regs);
+#ifndef CONFIG_SMP
+                update_process_times(user_mode(regs));
+#endif
+                r4k_cur += r4k_offset;
+                ack_r4ktimer(r4k_cur);
+
+        } while (((unsigned long)read_c0_count()
+                    - r4k_cur) < 0x7fffffff);
+        return;
+
+null:
+        ack_r4ktimer(0);
+}